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ac/nir/ngg: pass primitive_id_location as param for nogs lower

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radeonsi need to use packed driver location for all outputs,
while radv need to use VARYING_SLOT_*. To meet both drivers'
needs.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18832>
This commit is contained in:
Qiang Yu
2022-07-14 19:56:59 +08:00
committed by Marge Bot
parent d82b668bc6
commit 54eea0e393
3 changed files with 12 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/common/ac_nir.h
+1 -1
View File
@@ -129,10 +129,10 @@ ac_nir_lower_ngg_nogs(nir_shader *shader,
bool can_cull,
bool early_prim_export,
bool passthrough,
bool export_prim_id,
bool use_edgeflags,
bool has_prim_query,
bool disable_streamout,
int primitive_id_location,
uint32_t instance_rate_inputs,
uint32_t clipdist_enable_mask,
uint32_t user_clip_plane_enable_mask);
src/amd/common/ac_nir_lower_ngg.c
+8 -8
View File
@@ -58,7 +58,6 @@ typedef struct
struct u_vector saved_uniforms;
bool passthrough;
bool export_prim_id;
bool early_prim_export;
bool use_edgeflags;
bool has_prim_query;
@@ -69,6 +68,7 @@ typedef struct
unsigned num_vertices_per_primitives;
unsigned max_es_num_vertices;
unsigned position_store_base;
int primitive_id_location;
/* LDS params */
unsigned pervertex_lds_bytes;
@@ -430,7 +430,7 @@ static nir_ssa_def *
emit_ngg_nogs_prim_exp_arg(nir_builder *b, lower_ngg_nogs_state *st)
{
if (st->passthrough) {
assert(!st->export_prim_id || b->shader->info.stage != MESA_SHADER_VERTEX);
assert(st->primitive_id_location < 0 || b->shader->info.stage != MESA_SHADER_VERTEX);
return nir_load_packed_passthrough_primitive_amd(b);
} else {
nir_ssa_def *vtx_idx[3] = {0};
@@ -556,7 +556,7 @@ emit_store_ngg_nogs_es_primitive_id(nir_builder *b, lower_ngg_nogs_state *st)
};
nir_store_output(b, prim_id, nir_imm_zero(b, 1, 32),
.base = io_sem.location,
.base = st->primitive_id_location,
.src_type = nir_type_uint32, .io_semantics = io_sem);
}
@@ -1850,10 +1850,10 @@ ac_nir_lower_ngg_nogs(nir_shader *shader,
bool can_cull,
bool early_prim_export,
bool passthrough,
bool export_prim_id,
bool use_edgeflags,
bool has_prim_query,
bool disable_streamout,
int primitive_id_location,
uint32_t instance_rate_inputs,
uint32_t clipdist_enable_mask,
uint32_t user_clip_plane_enable_mask)
@@ -1883,7 +1883,7 @@ ac_nir_lower_ngg_nogs(nir_shader *shader,
lower_ngg_nogs_state state = {
.passthrough = passthrough,
.export_prim_id = export_prim_id,
.primitive_id_location = primitive_id_location,
.early_prim_export = early_prim_export,
.use_edgeflags = use_edgeflags,
.has_prim_query = has_prim_query,
@@ -1903,9 +1903,9 @@ ac_nir_lower_ngg_nogs(nir_shader *shader,
};
const bool need_prim_id_store_shared =
export_prim_id && shader->info.stage == MESA_SHADER_VERTEX;
primitive_id_location >= 0 && shader->info.stage == MESA_SHADER_VERTEX;
if (export_prim_id) {
if (primitive_id_location >= 0) {
nir_variable *prim_id_var = nir_variable_create(shader, nir_var_shader_out, glsl_uint_type(), "ngg_prim_id");
prim_id_var->data.location = VARYING_SLOT_PRIMITIVE_ID;
prim_id_var->data.driver_location = VARYING_SLOT_PRIMITIVE_ID;
@@ -2000,7 +2000,7 @@ ac_nir_lower_ngg_nogs(nir_shader *shader,
nir_cf_reinsert(&extracted, b->cursor);
b->cursor = nir_after_cf_list(&if_es_thread->then_list);
if (state.export_prim_id)
if (state.primitive_id_location >= 0)
emit_store_ngg_nogs_es_primitive_id(b, &state);
/* Export all vertex attributes (including the primitive ID) */
src/amd/vulkan/radv_shader.c
+3 -2
View File
@@ -1387,9 +1387,10 @@ void radv_lower_ngg(struct radv_device *device, struct radv_pipeline_stage *ngg_
device->physical_device->rad_info.family,
max_vtx_in, num_vertices_per_prim,
info->workgroup_size, info->wave_size, info->has_ngg_culling,
info->has_ngg_early_prim_export, info->is_ngg_passthrough, export_prim_id,
info->has_ngg_early_prim_export, info->is_ngg_passthrough,
false, pl_key->primitives_generated_query,
true, pl_key->vs.instance_rate_inputs, 0, 0);
true, export_prim_id ? VARYING_SLOT_PRIMITIVE_ID : -1,
pl_key->vs.instance_rate_inputs, 0, 0);
/* Increase ESGS ring size so the LLVM binary contains the correct LDS size. */
ngg_stage->info.ngg_info.esgs_ring_size = nir->info.shared_size;