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nv50,nvc0: stop limiting the number of active queries to 1

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This limitation was initially here because AMD_performance_monitor
doesn't allow to expose the real number of hardware counters. But
this actually really annoying when profiling with qapitrace.

Anyways, performance counters are mostly for developers and
failures are expected if you try to monitor more queries than
supported.

This breaks amd_performance_monitor_measure but it's expected.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
This commit is contained in:
Samuel Pitoiset
2016-10-27 00:08:30 +02:00
parent b6137f226c
commit 548b5fee6b
2 changed files with 12 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
src/gallium/drivers/nouveau/nv50/nv50_query.c
View File

@@ -208,13 +208,11 @@ nv50_screen_get_driver_query_group_info(struct pipe_screen *pscreen,
if (screen->base.class_3d >= NV84_3D_CLASS) {
info->name = "MP counters";
/* Because we can't expose the number of hardware counters needed
* for each different query, we don't want to allow more than one
* active query simultaneously to avoid failure when the maximum
* number of counters is reached. Note that these groups of GPU
* counters are currently only used by AMD_performance_monitor.
*/
info->max_active_queries = 1;
/* Expose the maximum number of hardware counters available,
* although some queries use more than one counter. Expect failures
* in that case but as performance counters are for developers,
* this should not have a real impact. */
info->max_active_queries = 4;
info->num_queries = NV50_HW_SM_QUERY_COUNT;
return 1;
}
@@ -224,7 +222,7 @@ nv50_screen_get_driver_query_group_info(struct pipe_screen *pscreen,
if (screen->compute) {
if (screen->base.class_3d >= NV84_3D_CLASS) {
info->name = "Performance metrics";
info->max_active_queries = 1;
info->max_active_queries = 2; /* A metric uses at least 2 queries */
info->num_queries = NV50_HW_METRIC_QUERY_COUNT;
return 1;
}

14
src/gallium/drivers/nouveau/nvc0/nvc0_query.c
View File

@@ -218,13 +218,11 @@ nvc0_screen_get_driver_query_group_info(struct pipe_screen *pscreen,
if (screen->compute) {
info->name = "MP counters";
/* Because we can't expose the number of hardware counters needed for
* each different query, we don't want to allow more than one active
* query simultaneously to avoid failure when the maximum number of
* counters is reached. Note that these groups of GPU counters are
* currently only used by AMD_performance_monitor.
*/
info->max_active_queries = 1;
/* Expose the maximum number of hardware counters available, although
* some queries use more than one counter. Expect failures in that
* case but as performance counters are for developers, this should
* not have a real impact. */
info->max_active_queries = 8;
info->num_queries = nvc0_hw_sm_get_num_queries(screen);
return 1;
}
@@ -233,7 +231,7 @@ nvc0_screen_get_driver_query_group_info(struct pipe_screen *pscreen,
if (screen->compute) {
if (screen->base.class_3d <= NVF0_3D_CLASS) {
info->name = "Performance metrics";
info->max_active_queries = 1;
info->max_active_queries = 4; /* A metric uses at least 2 queries */
info->num_queries = nvc0_hw_metric_get_num_queries(screen);
return 1;
}