radeonsi: export non-zero edgeflags for GS and tess

because edge flags are always enabled when polygon mode is enabled

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>

src/amd/common/ac_nir_lower_ngg.c

@@ -570,7 +570,7 @@ emit_ngg_nogs_prim_export(nir_builder *b, lower_ngg_nogs_state *s, nir_ssa_def *
                             .memory_semantics = NIR_MEMORY_ACQ_REL,
                             .memory_modes = nir_var_mem_shared);
 
-         unsigned edge_flag_bits = (1u << 9) | (1u << 19) | (1u << 29);
+         unsigned edge_flag_bits = ac_get_all_edge_flag_bits();
          nir_ssa_def *mask = nir_imm_intN_t(b, ~edge_flag_bits, 32);
 
          unsigned edge_flag_offset = 0;

src/amd/common/ac_shader_util.c

@@ -1153,3 +1153,9 @@ union ac_hw_cache_flags ac_get_hw_cache_flags(const struct radeon_info *info,
 
    return result;
 }
+
+unsigned ac_get_all_edge_flag_bits(void)
+{
+   /* This will be extended in the future. */
+   return (1u << 9) | (1u << 19) | (1u << 29);
+}

src/amd/common/ac_shader_util.h

@@ -224,6 +224,8 @@ enum gl_access_qualifier ac_get_mem_access_flags(const nir_intrinsic_instr *inst
 union ac_hw_cache_flags ac_get_hw_cache_flags(const struct radeon_info *info,
                                               enum gl_access_qualifier access);
 
+unsigned ac_get_all_edge_flag_bits(void);
+
 #ifdef __cplusplus
 }
 #endif