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aco/print_ir: use neg() for constants

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Otherwise, it's not clear if -1 is 0xffffffff or 0x80000001.
LLVM uses a similar logic.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30781>
This commit is contained in:
Georg Lehmann
2024-08-22 10:28:27 +02:00
committed by Marge Bot
parent fb8e730d9b
commit 52465956ca
2 changed files with 37 additions and 33 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/compiler/aco_print_ir.cpp
+5 -1
View File
@@ -1022,7 +1022,9 @@ aco_print_instr(enum amd_gfx_level gfx_level, const Instruction* instr, FILE* ou
fprintf(output, " ");
if (i < 3) {
if (neg[i])
if (neg[i] && instr->operands[i].isConstant())
fprintf(output, "neg(");
else if (neg[i])
fprintf(output, "-");
if (abs[i])
fprintf(output, "|");
@@ -1043,6 +1045,8 @@ aco_print_instr(enum amd_gfx_level gfx_level, const Instruction* instr, FILE* ou
if (opsel_lo[i] || !opsel_hi[i])
fprintf(output, ".%c%c", opsel_lo[i] ? 'y' : 'x', opsel_hi[i] ? 'y' : 'x');
if (neg[i] && instr->operands[i].isConstant())
fprintf(output, ")");
if (neg_lo[i])
fprintf(output, "*[-1,1]");
if (neg_hi[i])
src/amd/compiler/tests/test_optimizer.cpp
+32 -32
View File
@@ -1097,7 +1097,7 @@ BEGIN_TEST(optimize.mad_mix.input_conv.basic)
Temp a = inputs[0];
Temp a16 = inputs[1];
//! v1: %res0 = v_fma_mix_f32 %a, lo(%a16), -0
//! v1: %res0 = v_fma_mix_f32 %a, lo(%a16), neg(0)
//! p_unit_test 0, %res0
writeout(0, fmul(a, f2f32(a16)));
@@ -1188,72 +1188,72 @@ BEGIN_TEST(optimize.mad_mix.input_conv.modifiers)
Temp a16 = inputs[1];
/* check whether modifiers are preserved when converting to VOP3P */
//! v1: %res0 = v_fma_mix_f32 -%a, lo(%a16), -0
//! v1: %res0 = v_fma_mix_f32 -%a, lo(%a16), neg(0)
//! p_unit_test 0, %res0
writeout(0, fmul(fneg(a), f2f32(a16)));
//! v1: %res1 = v_fma_mix_f32 |%a|, lo(%a16), -0
//! v1: %res1 = v_fma_mix_f32 |%a|, lo(%a16), neg(0)
//! p_unit_test 1, %res1
writeout(1, fmul(fabs(a), f2f32(a16)));
/* fneg modifiers */
//! v1: %res2 = v_fma_mix_f32 %a, -lo(%a16), -0
//! v1: %res2 = v_fma_mix_f32 %a, -lo(%a16), neg(0)
//! p_unit_test 2, %res2
writeout(2, fmul(a, fneg(f2f32(a16))));
//! v1: %res3 = v_fma_mix_f32 %a, -lo(%a16), -0
//! v1: %res3 = v_fma_mix_f32 %a, -lo(%a16), neg(0)
//! p_unit_test 3, %res3
writeout(3, fmul(a, f2f32(fneg(a16))));
/* fabs modifiers */
//! v1: %res4 = v_fma_mix_f32 %a, |lo(%a16)|, -0
//! v1: %res4 = v_fma_mix_f32 %a, |lo(%a16)|, neg(0)
//! p_unit_test 4, %res4
writeout(4, fmul(a, fabs(f2f32(a16))));
//! v1: %res5 = v_fma_mix_f32 %a, |lo(%a16)|, -0
//! v1: %res5 = v_fma_mix_f32 %a, |lo(%a16)|, neg(0)
//! p_unit_test 5, %res5
writeout(5, fmul(a, f2f32(fabs(a16))));
/* both fabs and fneg modifiers */
//! v1: %res6 = v_fma_mix_f32 %a, -|lo(%a16)|, -0
//! v1: %res6 = v_fma_mix_f32 %a, -|lo(%a16)|, neg(0)
//! p_unit_test 6, %res6
writeout(6, fmul(a, fneg(f2f32(fabs(a16)))));
//! v1: %res7 = v_fma_mix_f32 %a, |lo(%a16)|, -0
//! v1: %res7 = v_fma_mix_f32 %a, |lo(%a16)|, neg(0)
//! p_unit_test 7, %res7
writeout(7, fmul(a, fabs(f2f32(fabs(a16)))));
//! v1: %res8 = v_fma_mix_f32 %a, -|lo(%a16)|, -0
//! v1: %res8 = v_fma_mix_f32 %a, -|lo(%a16)|, neg(0)
//! p_unit_test 8, %res8
writeout(8, fmul(a, fneg(fabs(f2f32(fabs(a16))))));
//! v1: %res9 = v_fma_mix_f32 %a, -|lo(%a16)|, -0
//! v1: %res9 = v_fma_mix_f32 %a, -|lo(%a16)|, neg(0)
//! p_unit_test 9, %res9
writeout(9, fmul(a, f2f32(fneg(fabs(a16)))));
//! v1: %res10 = v_fma_mix_f32 %a, |lo(%a16)|, -0
//! v1: %res10 = v_fma_mix_f32 %a, |lo(%a16)|, neg(0)
//! p_unit_test 10, %res10
writeout(10, fmul(a, fneg(f2f32(fneg(fabs(a16))))));
//! v1: %res11 = v_fma_mix_f32 %a, |lo(%a16)|, -0
//! v1: %res11 = v_fma_mix_f32 %a, |lo(%a16)|, neg(0)
//! p_unit_test 11, %res11
writeout(11, fmul(a, fabs(f2f32(fneg(fabs(a16))))));
//! v1: %res12 = v_fma_mix_f32 %a, -|lo(%a16)|, -0
//! v1: %res12 = v_fma_mix_f32 %a, -|lo(%a16)|, neg(0)
//! p_unit_test 12, %res12
writeout(12, fmul(a, fneg(fabs(f2f32(fneg(fabs(a16)))))));
/* sdwa */
//! v1: %res13 = v_fma_mix_f32 lo(%a), %a, -0
//! v1: %res13 = v_fma_mix_f32 lo(%a), %a, neg(0)
//! p_unit_test 13, %res13
writeout(13, fmul(f2f32(ext_ushort(a, 0)), a));
//! v1: %res14 = v_fma_mix_f32 hi(%a), %a, -0
//! v1: %res14 = v_fma_mix_f32 hi(%a), %a, neg(0)
//! p_unit_test 14, %res14
writeout(14, fmul(f2f32(ext_ushort(a, 1)), a));
//~gfx(9|10)! v1: %res15_cvt = v_cvt_f32_f16 %a dst_sel:uword0 src0_sel:dword
//~gfx11! v1: %res16_cvt1 = v_fma_mix_f32 lo(%a), 1.0, -0
//~gfx11! v1: %res16_cvt1 = v_fma_mix_f32 lo(%a), 1.0, neg(0)
//~gfx11! v1: %res15_cvt = p_extract %res16_cvt1, 0, 16, 0
//! v1: %res15 = v_mul_f32 %res15_cvt, %a
//! p_unit_test 15, %res15
@@ -1261,7 +1261,7 @@ BEGIN_TEST(optimize.mad_mix.input_conv.modifiers)
//~gfx(9|10)! v1: %res16_cvt = v_cvt_f32_f16 %a
//~gfx(9|10)! v1: %res16 = v_mul_f32 %res16_cvt, %a dst_sel:dword src0_sel:uword1 src1_sel:dword
//~gfx11! v1: %res16_cvt = v_fma_mix_f32 lo(%a), 1.0, -0
//~gfx11! v1: %res16_cvt = v_fma_mix_f32 lo(%a), 1.0, neg(0)
//~gfx11! v1: %res16_ext = p_extract %res16_cvt, 1, 16, 0
//~gfx11! v1: %res16 = v_mul_f32 %res16_ext, %a
//! p_unit_test 16, %res16
@@ -1270,7 +1270,7 @@ BEGIN_TEST(optimize.mad_mix.input_conv.modifiers)
//~gfx(9|10)! v1: %res17_cvt = v_cvt_f32_f16 %a dst_sel:dword src0_sel:ubyte2
//~gfx(9|10)! v1: %res17 = v_mul_f32 %res17_cvt, %a
//~gfx11! v1: %res17_ext = p_extract %a, 2, 8, 0
//~gfx11! v1: %res17 = v_fma_mix_f32 lo(%res17_ext), %a, -0
//~gfx11! v1: %res17 = v_fma_mix_f32 lo(%res17_ext), %a, neg(0)
//! p_unit_test 17, %res17
writeout(17, fmul(f2f32(ext_ubyte(a, 2)), a));
@@ -1292,7 +1292,7 @@ BEGIN_TEST(optimize.mad_mix.output_conv.basic)
Temp a16 = inputs[3];
Temp b16 = inputs[4];
//! v2b: %res0 = v_fma_mixlo_f16 %a, %b, -lo(0)
//! v2b: %res0 = v_fma_mixlo_f16 %a, %b, neg(lo(0))
//! p_unit_test 0, %res0
writeout(0, f2f16(fmul(a, b)));
@@ -1304,7 +1304,7 @@ BEGIN_TEST(optimize.mad_mix.output_conv.basic)
//! p_unit_test 2, %res2
writeout(2, f2f16(fma(a, b, c)));
//! v2b: %res3 = v_fma_mixlo_f16 lo(%a16), %b, -lo(0)
//! v2b: %res3 = v_fma_mixlo_f16 lo(%a16), %b, neg(lo(0))
//! p_unit_test 3, %res3
writeout(3, f2f16(fmul(f2f32(a16), b)));
@@ -1416,7 +1416,7 @@ BEGIN_TEST(optimize.mad_mix.fma.basic)
writeout(1, fadd(fmul(a, b), f2f32(c16)));
/* omod/clamp check */
//! v1: %res2_mul = v_fma_mix_f32 lo(%a16), %b, -0
//! v1: %res2_mul = v_fma_mix_f32 lo(%a16), %b, neg(0)
//! v1: %res2 = v_add_f32 %res2_mul, %c *2
//! p_unit_test 2, %res2
writeout(2, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), Operand::c32(0x40000000),
@@ -1464,13 +1464,13 @@ BEGIN_TEST(optimize.mad_mix.fma.precision)
/* the optimization is precise for 32-bit on GFX9 */
//~gfx9! v1: (precise)%res0 = v_fma_mix_f32 lo(%a16), %b, %c
//~gfx10! v1: (precise)%res0_tmp = v_fma_mix_f32 lo(%a16), %b, -0
//~gfx10! v1: (precise)%res0_tmp = v_fma_mix_f32 lo(%a16), %b, neg(0)
//~gfx10! v1: %res0 = v_add_f32 %res0_tmp, %c
//! p_unit_test 0, %res0
writeout(0, fadd(fmul(f2f32(a16), b, bld.precise()), c));
//~gfx9! v1: (precise)%res1 = v_fma_mix_f32 lo(%a16), %b, %c
//~gfx10! v1: %res1_tmp = v_fma_mix_f32 lo(%a16), %b, -0
//~gfx10! v1: %res1_tmp = v_fma_mix_f32 lo(%a16), %b, neg(0)
//~gfx10! v1: (precise)%res1 = v_add_f32 %res1_tmp, %c
//! p_unit_test 1, %res1
writeout(1, fadd(fmul(f2f32(a16), b), c, bld.precise()));
@@ -1496,7 +1496,7 @@ BEGIN_TEST(optimize.mad_mix.fma.precision)
//! p_unit_test 5, %res5
writeout(5, f2f32(fadd(a16, b16)));
//! v2b: %res6_tmp = v_fma_mixlo_f16 %a, %b, -lo(0)
//! v2b: %res6_tmp = v_fma_mixlo_f16 %a, %b, neg(lo(0))
//! v2b: %res6 = v_add_f16 %res6_tmp, %a16
//! p_unit_test 6, %res6
writeout(6, fadd(f2f16(fmul(a, b)), a16));
@@ -1521,15 +1521,15 @@ BEGIN_TEST(optimize.mad_mix.clamp)
Temp a = inputs[0];
Temp a16 = inputs[1];
//! v1: %res0 = v_fma_mix_f32 lo(%a16), %a, -0 clamp
//! v1: %res0 = v_fma_mix_f32 lo(%a16), %a, neg(0) clamp
//! p_unit_test 0, %res0
writeout(0, fsat(fmul(f2f32(a16), a)));
//! v2b: %res1 = v_fma_mixlo_f16 %a, %a, -lo(0) clamp
//! v2b: %res1 = v_fma_mixlo_f16 %a, %a, neg(lo(0)) clamp
//! p_unit_test 1, %res1
writeout(1, f2f16(fsat(fmul(a, a))));
//! v2b: %res2 = v_fma_mixlo_f16 %a, %a, -lo(0) clamp
//! v2b: %res2 = v_fma_mixlo_f16 %a, %a, neg(lo(0)) clamp
//! p_unit_test 2, %res2
writeout(2, fsat(f2f16(fmul(a, a))));
@@ -1572,12 +1572,12 @@ BEGIN_TEST(optimize.mad_mix.cast)
//! p_unit_test 3, %res3
writeout(3, f2f32(u2u16(fmul(a, a))));
//! v1: %res4_mul = v_fma_mix_f32 lo(%a16), %a, -0
//! v1: %res4_mul = v_fma_mix_f32 lo(%a16), %a, neg(0)
//! v2b: %res4 = v_add_f16 %res4_mul, 0 clamp
//! p_unit_test 4, %res4
writeout(4, fsat(u2u16(fmul(f2f32(a16), a))));
//! v2b: %res5_mul = v_fma_mixlo_f16 %a, %a, -lo(0)
//! v2b: %res5_mul = v_fma_mixlo_f16 %a, %a, neg(lo(0))
//! v1: %res5 = v_add_f32 %res5_mul, 0 clamp
//! p_unit_test 5, %res5
writeout(5, fsat(bld.as_uniform(f2f16(fmul(a, a)))));
@@ -1593,7 +1593,7 @@ BEGIN_TEST(optimize.mad_mix.cast)
writeout(7, fadd(bld.as_uniform(fmul(a16, a16)), f2f32(a16)));
/* opsel_hi should be obtained from the original opcode, not the operand regclass */
//! v1: %res8 = v_fma_mix_f32 lo(%a16), %a16, -0
//! v1: %res8 = v_fma_mix_f32 lo(%a16), %a16, neg(0)
//! p_unit_test 8, %res8
writeout(8, fmul(f2f32(a16), a16));
@@ -1951,7 +1951,7 @@ BEGIN_TEST(optimize.neg_mul_opsel)
//! p_unit_test 0, %res0
writeout(0, fneg(fmul(a_hi, b)));
//! v1: %res1 = v_fma_mix_f32 -hi(%a), lo(%b), -0
//! v1: %res1 = v_fma_mix_f32 -hi(%a), lo(%b), neg(0)
//! p_unit_test 1, %res1
writeout(1, fneg(fmul(f2f32(a_hi), f2f32(b))));