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i965: Don't print source registers for Broadwell flow control.

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The bits which normally contain the source register descriptions
actually contain the JIP/UIP jump targets, which we already printed.

Interpreting JIP/UIP as source registers results in some really creepy
looking output, like IF statements with acc14.4<0,1,0>UD sources.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Kenneth Graunke
2014-02-05 01:32:39 -08:00
parent 8e0a0e4d30
commit 5230655a2e
1 changed files with 14 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/mesa/drivers/dri/i965/gen8_disasm.c
+14 -13
View File
@@ -828,10 +828,7 @@ gen8_disassemble(FILE *file, struct gen8_instruction *inst, int gen)
pad(file, 64);
err |= src2_3src(file, inst);
} else {
if (m_opcode[opcode].ndst > 0) {
pad(file, 16);
err |= dest(file, inst);
} else if (opcode == BRW_OPCODE_ENDIF) {
if (opcode == BRW_OPCODE_ENDIF) {
format(file, " %d", gen8_jip(inst));
} else if (opcode == BRW_OPCODE_IF ||
opcode == BRW_OPCODE_ELSE ||
@@ -840,15 +837,19 @@ gen8_disassemble(FILE *file, struct gen8_instruction *inst, int gen)
opcode == BRW_OPCODE_CONTINUE ||
opcode == BRW_OPCODE_HALT) {
format(file, " %d %d", gen8_jip(inst), gen8_uip(inst));
}
if (m_opcode[opcode].nsrc > 0) {
pad(file, 32);
err |= src0(file, inst);
}
if (m_opcode[opcode].nsrc > 1) {
pad(file, 48);
err |= src1(file, inst);
} else {
if (m_opcode[opcode].ndst > 0) {
pad(file, 16);
err |= dest(file, inst);
}
if (m_opcode[opcode].nsrc > 0) {
pad(file, 32);
err |= src0(file, inst);
}
if (m_opcode[opcode].nsrc > 1) {
pad(file, 48);
err |= src1(file, inst);
}
}
}