tu: enable fragmentShadingRateWithShaderSampleMask

We disabled it because it didn't play nicely together with
VK_EXT_post_depth_coverage. Since we disabled the latter, we can enable
this one now.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13414
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35788>

src/freedreno/vulkan/tu_cmd_buffer.cc

@@ -4520,15 +4520,11 @@ tu_CmdBindPipeline(VkCommandBuffer commandBuffer,
    if (pipeline->program.writes_shading_rate !=
           cmd->state.pipeline_writes_shading_rate ||
        pipeline->program.reads_shading_rate !=
-          cmd->state.pipeline_reads_shading_rate ||
-       pipeline->program.accesses_smask !=
-          cmd->state.pipeline_accesses_smask) {
+          cmd->state.pipeline_reads_shading_rate) {
       cmd->state.pipeline_writes_shading_rate =
          pipeline->program.writes_shading_rate;
       cmd->state.pipeline_reads_shading_rate =
          pipeline->program.reads_shading_rate;
-      cmd->state.pipeline_accesses_smask =
-         pipeline->program.accesses_smask;
       cmd->state.dirty |= TU_CMD_DIRTY_SHADING_RATE;
    }
 

src/freedreno/vulkan/tu_device.cc

@@ -1176,8 +1176,7 @@ tu_get_properties(struct tu_physical_device *pdevice,
    props->maxFragmentShadingRateRasterizationSamples = VK_SAMPLE_COUNT_4_BIT;
    props->fragmentShadingRateWithShaderDepthStencilWrites = true;
    props->fragmentShadingRateWithSampleMask = true;
-   /* Has wrong gl_SampleMaskIn[0] values with VK_EXT_post_depth_coverage used. */
-   props->fragmentShadingRateWithShaderSampleMask = false;
+   props->fragmentShadingRateWithShaderSampleMask = true;
    props->fragmentShadingRateWithConservativeRasterization = true;
    props->fragmentShadingRateWithFragmentShaderInterlock = false;
    props->fragmentShadingRateWithCustomSampleLocations = true;

src/freedreno/vulkan/tu_pipeline.cc

@@ -2348,7 +2348,6 @@ tu_emit_program_state(struct tu_cs *sub_cs,
       prog->per_layer_viewport;
    prog->writes_shading_rate = last_variant->writes_shading_rate;
    prog->reads_shading_rate = fs->reads_shading_rate;
-   prog->accesses_smask = fs->reads_smask || fs->writes_smask;
 }
 
 static const enum mesa_vk_dynamic_graphics_state tu_vertex_input_state[] = {
@@ -3574,8 +3573,7 @@ tu6_fragment_shading_rate_size(struct tu_device *dev,
                                const vk_fragment_shading_rate_state *fsr,
                                bool enable_att_fsr,
                                bool enable_prim_fsr,
-                               bool fs_reads_fsr,
-                               bool sample_shading)
+                               bool fs_reads_fsr)
 {
    return 6;
 }
@@ -3586,8 +3584,7 @@ tu6_emit_fragment_shading_rate(struct tu_cs *cs,
                                const vk_fragment_shading_rate_state *fsr,
                                bool enable_att_fsr,
                                bool enable_prim_fsr,
-                               bool fs_reads_fsr,
-                               bool accesses_smask)
+                               bool fs_reads_fsr)
 {
    /* gl_ShadingRateEXT don't read 1x1 value with null config, so
     * if it is read - we have to emit the config.
@@ -3623,15 +3620,6 @@ tu6_emit_fragment_shading_rate(struct tu_cs *cs,
       }
    }
 
-   /* Force 1x1 FSR because we don't support
-    * fragmentShadingRateWithShaderSampleMask.
-    */
-   if (accesses_smask) {
-      enable_att_fsr = enable_prim_fsr = false;
-      frag_width = frag_height = 1;
-      enable_draw_fsr = true;
-   }
-
    tu_cs_emit_regs(
       cs,
       A6XX_RB_VRS_CONFIG(.unk2 = true, .pipeline_fsr_enable = enable_draw_fsr,
@@ -3859,8 +3847,7 @@ tu_pipeline_builder_emit_state(struct tu_pipeline_builder *builder,
                       builder->graphics_state.fsr,
                       has_fsr_att,
                       pipeline->program.writes_shading_rate,
-                      pipeline->program.reads_shading_rate,
-                      pipeline->program.accesses_smask);
+                      pipeline->program.reads_shading_rate);
    }
 #undef DRAW_STATE
 #undef DRAW_STATE_COND
@@ -4053,8 +4040,7 @@ tu_emit_draw_state(struct tu_cmd_buffer *cmd)
                &cmd->vk.dynamic_graphics_state.fsr,
                cmd->state.subpass->fsr_attachment != VK_ATTACHMENT_UNUSED,
                cmd->state.program.writes_shading_rate,
-               cmd->state.program.reads_shading_rate,
-               cmd->state.program.accesses_smask);
+               cmd->state.program.reads_shading_rate);
    }
    DRAW_STATE_COND(rast, TU_DYNAMIC_STATE_RAST,
                    cmd->state.dirty & (TU_CMD_DIRTY_SUBPASS |

src/freedreno/vulkan/tu_pipeline.h

@@ -151,7 +151,6 @@ struct tu_program_state
 
       bool writes_shading_rate;
       bool reads_shading_rate;
-      bool accesses_smask;
       bool uses_ray_intersection;
 };