i965: Avoid using float type for raw moves, to work around SNB issue.

The SNB alt-mode math does the denorm and inf reduction even for a
"raw MOV" like we do for g0 message header setup, where we are moving
values that aren't actually floats.  Just use UD type, where raw MOVs
really are raw MOVs.

Fixes glxgears since c52adfc2e1, but no
piglit tests had regressed(!)
This commit is contained in:
Eric Anholt
2010-12-21 13:04:07 -08:00
parent fa62cf7450
commit 4fe78d3e12
2 changed files with 8 additions and 4 deletions
+6 -3
View File
@@ -1936,7 +1936,8 @@ void brw_SAMPLE(struct brw_compile *p,
brw_set_compression_control(p, BRW_COMPRESSION_NONE);
brw_set_mask_control(p, BRW_MASK_DISABLE);
brw_MOV(p, m1, brw_vec8_grf(0,0));
brw_MOV(p, retype(m1, BRW_REGISTER_TYPE_UD),
retype(brw_vec8_grf(0,0), BRW_REGISTER_TYPE_UD));
brw_MOV(p, get_element_ud(m1, 2), brw_imm_ud(newmask << 12));
brw_pop_insn_state(p);
@@ -1997,7 +1998,8 @@ void brw_SAMPLE(struct brw_compile *p,
*/
brw_push_insn_state(p);
brw_set_compression_control(p, BRW_COMPRESSION_NONE);
brw_MOV(p, reg, reg);
brw_MOV(p, retype(reg, BRW_REGISTER_TYPE_UD),
retype(reg, BRW_REGISTER_TYPE_UD));
brw_pop_insn_state(p);
}
@@ -2029,7 +2031,8 @@ void brw_urb_WRITE(struct brw_compile *p,
if (intel->gen >= 6) {
brw_push_insn_state(p);
brw_set_mask_control( p, BRW_MASK_DISABLE );
brw_MOV(p, brw_message_reg(msg_reg_nr), src0);
brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD),
retype(src0, BRW_REGISTER_TYPE_UD));
brw_pop_insn_state(p);
src0 = brw_message_reg(msg_reg_nr);
}
+2 -1
View File
@@ -1501,7 +1501,8 @@ void emit_fb_write(struct brw_wm_compile *c,
*/
brw_push_insn_state(p);
brw_set_mask_control(p, BRW_MASK_DISABLE);
brw_MOV(p, brw_message_reg(0), brw_vec8_grf(0, 0));
brw_MOV(p, retype(brw_message_reg(0), BRW_REGISTER_TYPE_UD),
retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD));
brw_pop_insn_state(p);
if (target != 0) {