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swr: set caps for VB 4-byte alignment

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Needed to compensate for change to fetch jit requiring
alignment.

Fixes regressions in piglit: vertex-buffer-offsets and about
another hundred of the vs-input*byte* tests.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
This commit is contained in:
Tim Rowley
2017-08-18 11:51:59 -05:00
parent 4475583f5e
commit 4edc5d8305
1 changed files with 6 additions and 3 deletions
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src/gallium/drivers/swr/swr_screen.cpp
+6 -3
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@@ -263,6 +263,12 @@ swr_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_FAKE_SW_MSAA:
return (swr_screen(screen)->msaa_max_count > 1) ? 0 : 1;
/* fetch jit change for 2-4GB buffers requires alignment */
case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
return 1;
/* unsupported features */
case PIPE_CAP_ANISOTROPIC_FILTER:
case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
@@ -274,9 +280,6 @@ swr_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_COMPUTE:
case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_TGSI_TEXCOORD:
case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS: