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radv/gfx10: fix wrong emission of GE_CNTL

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset
2019-07-12 11:12:58 +02:00
parent 219d6939df
commit 4e38322dd8
1 changed files with 1 additions and 1 deletions
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src/amd/vulkan/radv_pipeline.c
+1 -1
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@@ -3461,7 +3461,7 @@ radv_pipeline_generate_hw_ngg(struct radeon_cmdbuf *ctx_cs,
S_028838_INDEX_BUF_EDGE_FLAG_ENA(!radv_pipeline_has_tess(pipeline) &&
!radv_pipeline_has_gs(pipeline)));
radeon_set_context_reg(ctx_cs, R_03096C_GE_CNTL,
radeon_set_uconfig_reg(ctx_cs, R_03096C_GE_CNTL,
S_03096C_PRIM_GRP_SIZE(ngg_state->max_gsprims) |
S_03096C_VERT_GRP_SIZE(ngg_state->hw_max_esverts) |
S_03096C_BREAK_WAVE_AT_EOI(break_wave_at_eoi));