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anv: consolidate pre/post draw workaround in helpers

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This avoids sprinkling those all over the code base. Debug breakpoints
are put in there too.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Backport-to: 24.2
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31481>
This commit is contained in:
Lionel Landwerlin
2024-10-02 11:45:17 +03:00
committed by Marge Bot
parent 18e2c25dad
commit 4cdb5de163
2 changed files with 146 additions and 215 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/intel/vulkan/genX_cmd_buffer.c
-39
View File
@@ -6220,45 +6220,6 @@ genX(batch_emit_return)(struct anv_batch *batch)
.SecondLevelBatchBuffer = Firstlevelbatch);
}
void
genX(batch_emit_post_3dprimitive_was)(struct anv_batch *batch,
const struct anv_device *device,
uint32_t primitive_topology,
uint32_t vertex_count)
{
#if INTEL_WA_22014412737_GFX_VER || INTEL_WA_16014538804_GFX_VER
if (intel_needs_workaround(device->info, 22014412737) &&
(primitive_topology == _3DPRIM_POINTLIST ||
primitive_topology == _3DPRIM_LINELIST ||
primitive_topology == _3DPRIM_LINESTRIP ||
primitive_topology == _3DPRIM_LINELIST_ADJ ||
primitive_topology == _3DPRIM_LINESTRIP_ADJ ||
primitive_topology == _3DPRIM_LINELOOP ||
primitive_topology == _3DPRIM_POINTLIST_BF ||
primitive_topology == _3DPRIM_LINESTRIP_CONT ||
primitive_topology == _3DPRIM_LINESTRIP_BF ||
primitive_topology == _3DPRIM_LINESTRIP_CONT_BF) &&
(vertex_count == 1 || vertex_count == 2)) {
genx_batch_emit_pipe_control_write
(batch, device->info, 0, WriteImmediateData,
device->workaround_address, 0, 0);
/* Reset counter because we just emitted a PC */
batch->num_3d_primitives_emitted = 0;
} else if (intel_needs_workaround(device->info, 16014538804)) {
batch->num_3d_primitives_emitted++;
/* WA 16014538804:
* After every 3 3D_Primitive command,
* atleast 1 pipe_control must be inserted.
*/
if (batch->num_3d_primitives_emitted == 3) {
anv_batch_emit(batch, GENX(PIPE_CONTROL), pc);
batch->num_3d_primitives_emitted = 0;
}
}
#endif
}
/* Wa_16018063123 */
ALWAYS_INLINE void
genX(batch_emit_fast_color_dummy_blit)(struct anv_batch *batch,
src/intel/vulkan/genX_cmd_draw.c
+146 -176
View File
@@ -647,49 +647,6 @@ cmd_buffer_flush_mesh_inline_data(struct anv_cmd_buffer *cmd_buffer,
}
#endif
ALWAYS_INLINE static void
genX(emit_hs)(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_graphics_pipeline *pipeline =
anv_pipeline_to_graphics(cmd_buffer->state.gfx.base.pipeline);
if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL))
return;
anv_batch_emit_pipeline_state(&cmd_buffer->batch, pipeline, final.hs);
}
ALWAYS_INLINE static void
genX(emit_ds)(struct anv_cmd_buffer *cmd_buffer)
{
#if INTEL_WA_22018402687_GFX_VER
if (!intel_needs_workaround(cmd_buffer->device->info, 22018402687))
return;
/* Wa_22018402687:
* In any 3D enabled context, just before any Tessellation enabled draw
* call (3D Primitive), re-send the last programmed 3DSTATE_DS again.
* This will make sure that the 3DSTATE_INT generated just before the
* draw call will have TDS dirty which will make sure TDS will launch the
* state thread before the draw call.
*
* This fixes a hang resulting from running anything using tessellation
* after a switch away from the mesh pipeline.
* We don't need to track said switch, as it matters at the HW level, and
* can be triggered even across processes, so we apply the Wa at all times.
*/
struct anv_graphics_pipeline *pipeline =
anv_pipeline_to_graphics(cmd_buffer->state.gfx.base.pipeline);
if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL))
return;
const bool protected = cmd_buffer->vk.pool->flags &
VK_COMMAND_POOL_CREATE_PROTECTED_BIT;
anv_batch_emit_pipeline_state_protected(&cmd_buffer->batch, pipeline,
final.ds, protected);
#endif
}
ALWAYS_INLINE static void
cmd_buffer_maybe_flush_rt_writes(struct anv_cmd_buffer *cmd_buffer,
const struct anv_graphics_pipeline *pipeline)
@@ -853,12 +810,6 @@ genX(cmd_buffer_flush_gfx_state)(struct anv_cmd_buffer *cmd_buffer)
&cmd_buffer->state.gfx.base,
&pipeline->base.base);
/* Wa_1306463417, Wa_16011107343 - Send HS state for every primitive. */
if (cmd_buffer->state.gfx.dirty & ANV_CMD_DIRTY_PIPELINE ||
(INTEL_NEEDS_WA_1306463417 || INTEL_NEEDS_WA_16011107343)) {
genX(emit_hs)(cmd_buffer);
}
if (!cmd_buffer->state.gfx.dirty && !descriptors_dirty &&
!any_dynamic_state_dirty &&
((cmd_buffer->state.push_constants_dirty &
@@ -1030,6 +981,107 @@ anv_use_generated_draws(const struct anv_cmd_buffer *cmd_buffer, uint32_t count)
#include "genX_cmd_draw_helpers.h"
#include "genX_cmd_draw_generated_indirect.h"
ALWAYS_INLINE static void
cmd_buffer_pre_draw_wa(struct anv_cmd_buffer *cmd_buffer)
{
UNUSED const bool protected = cmd_buffer->vk.pool->flags &
VK_COMMAND_POOL_CREATE_PROTECTED_BIT;
UNUSED struct anv_graphics_pipeline *pipeline =
anv_pipeline_to_graphics(cmd_buffer->state.gfx.base.pipeline);
#if INTEL_WA_16011107343_GFX_VER
if (intel_needs_workaround(cmd_buffer->device->info, 16011107343) &&
anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_CTRL)) {
anv_batch_emit_pipeline_state_protected(&cmd_buffer->batch, pipeline,
final.hs, protected);
}
#endif
#if INTEL_WA_22018402687_GFX_VER
if (intel_needs_workaround(cmd_buffer->device->info, 22018402687) &&
anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL)) {
/* Wa_22018402687:
* In any 3D enabled context, just before any Tessellation enabled
* draw call (3D Primitive), re-send the last programmed 3DSTATE_DS
* again. This will make sure that the 3DSTATE_INT generated just
* before the draw call will have TDS dirty which will make sure TDS
* will launch the state thread before the draw call.
*
* This fixes a hang resulting from running anything using tessellation
* after a switch away from the mesh pipeline. We don't need to track
* said switch, as it matters at the HW level, and can be triggered even
* across processes, so we apply the Wa at all times.
*/
anv_batch_emit_pipeline_state_protected(&cmd_buffer->batch, pipeline,
final.ds, protected);
}
#endif
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, true);
}
ALWAYS_INLINE static void
batch_post_draw_wa(struct anv_batch *batch,
const struct anv_device *device,
uint32_t primitive_topology,
uint32_t vertex_count)
{
#if INTEL_WA_22014412737_GFX_VER || INTEL_WA_16014538804_GFX_VER
if (intel_needs_workaround(device->info, 22014412737) &&
(primitive_topology == _3DPRIM_POINTLIST ||
primitive_topology == _3DPRIM_LINELIST ||
primitive_topology == _3DPRIM_LINESTRIP ||
primitive_topology == _3DPRIM_LINELIST_ADJ ||
primitive_topology == _3DPRIM_LINESTRIP_ADJ ||
primitive_topology == _3DPRIM_LINELOOP ||
primitive_topology == _3DPRIM_POINTLIST_BF ||
primitive_topology == _3DPRIM_LINESTRIP_CONT ||
primitive_topology == _3DPRIM_LINESTRIP_BF ||
primitive_topology == _3DPRIM_LINESTRIP_CONT_BF) &&
(vertex_count == 1 || vertex_count == 2)) {
genx_batch_emit_pipe_control_write
(batch, device->info, 0, WriteImmediateData,
device->workaround_address, 0, 0);
/* Reset counter because we just emitted a PC */
batch->num_3d_primitives_emitted = 0;
} else if (intel_needs_workaround(device->info, 16014538804)) {
batch->num_3d_primitives_emitted++;
/* WA 16014538804:
* After every 3 3D_Primitive command,
* atleast 1 pipe_control must be inserted.
*/
if (batch->num_3d_primitives_emitted == 3) {
anv_batch_emit(batch, GENX(PIPE_CONTROL), pc);
batch->num_3d_primitives_emitted = 0;
}
}
#endif
}
void
genX(batch_emit_post_3dprimitive_was)(struct anv_batch *batch,
const struct anv_device *device,
uint32_t primitive_topology,
uint32_t vertex_count)
{
batch_post_draw_wa(batch, device, primitive_topology, vertex_count);
}
ALWAYS_INLINE static void
cmd_buffer_post_draw_wa(struct anv_cmd_buffer *cmd_buffer,
uint32_t vertex_count,
uint32_t access_type)
{
batch_post_draw_wa(&cmd_buffer->batch, cmd_buffer->device,
cmd_buffer->state.gfx.primitive_topology,
vertex_count);
update_dirty_vbs_for_gfx8_vb_flush(cmd_buffer, access_type);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
}
#if GFX_VER >= 11
#define _3DPRIMITIVE_DIRECT GENX(3DPRIMITIVE_EXTENDED)
#else
@@ -1071,12 +1123,11 @@ void genX(CmdDraw)(
#endif
genX(cmd_buffer_flush_gfx_state)(cmd_buffer);
genX(emit_ds)(cmd_buffer);
if (cmd_buffer->state.conditional_render_enabled)
genX(cmd_emit_conditional_render_predicate)(cmd_buffer);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, true);
cmd_buffer_pre_draw_wa(cmd_buffer);
anv_batch_emit(&cmd_buffer->batch, _3DPRIMITIVE_DIRECT, prim) {
prim.PredicateEnable = cmd_buffer->state.conditional_render_enabled;
@@ -1098,13 +1149,7 @@ void genX(CmdDraw)(
#endif
}
genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
cmd_buffer->device,
cmd_buffer->state.gfx.primitive_topology,
vertexCount);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
update_dirty_vbs_for_gfx8_vb_flush(cmd_buffer, SEQUENTIAL);
cmd_buffer_post_draw_wa(cmd_buffer, vertexCount, SEQUENTIAL);
trace_intel_end_draw(&cmd_buffer->trace, count);
}
@@ -1144,7 +1189,7 @@ void genX(CmdDrawMultiEXT)(
"draw multi", count);
trace_intel_begin_draw_multi(&cmd_buffer->trace);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, true);
cmd_buffer_pre_draw_wa(cmd_buffer);
anv_batch_emit(&cmd_buffer->batch, GENX(3DPRIMITIVE), prim) {
prim.PredicateEnable = cmd_buffer->state.conditional_render_enabled;
@@ -1157,32 +1202,21 @@ void genX(CmdDrawMultiEXT)(
prim.BaseVertexLocation = 0;
}
genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
cmd_buffer->device,
cmd_buffer->state.gfx.primitive_topology,
drawCount == 0 ? 0 :
pVertexInfo[drawCount - 1].vertexCount);
cmd_buffer_post_draw_wa(cmd_buffer, drawCount == 0 ? 0 :
pVertexInfo[drawCount - 1].vertexCount,
SEQUENTIAL);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
trace_intel_end_draw_multi(&cmd_buffer->trace, count);
}
#else
vk_foreach_multi_draw(draw, i, pVertexInfo, drawCount, stride) {
/* Wa_1306463417, Wa_16011107343 - Send HS state for every primitive,
* first one was handled by cmd_buffer_flush_gfx_state.
*/
if (i && (INTEL_NEEDS_WA_1306463417 || INTEL_NEEDS_WA_16011107343))
genX(emit_hs)(cmd_buffer);
genX(emit_ds)(cmd_buffer);
const uint32_t count = draw->vertexCount * instanceCount;
anv_measure_snapshot(cmd_buffer,
INTEL_SNAPSHOT_DRAW,
"draw multi", count);
trace_intel_begin_draw_multi(&cmd_buffer->trace);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, true);
cmd_buffer_pre_draw_wa(cmd_buffer);
anv_batch_emit(&cmd_buffer->batch, _3DPRIMITIVE_DIRECT, prim) {
#if GFX_VERx10 >= 125
@@ -1202,18 +1236,13 @@ void genX(CmdDrawMultiEXT)(
prim.ExtendedParameter2 = i;
}
genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
cmd_buffer->device,
cmd_buffer->state.gfx.primitive_topology,
drawCount == 0 ? 0 :
pVertexInfo[drawCount - 1].vertexCount);
cmd_buffer_post_draw_wa(cmd_buffer, drawCount == 0 ? 0 :
pVertexInfo[drawCount - 1].vertexCount,
SEQUENTIAL);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
trace_intel_end_draw_multi(&cmd_buffer->trace, count);
}
#endif
update_dirty_vbs_for_gfx8_vb_flush(cmd_buffer, SEQUENTIAL);
}
void genX(CmdDrawIndexed)(
@@ -1257,7 +1286,7 @@ void genX(CmdDrawIndexed)(
if (cmd_buffer->state.conditional_render_enabled)
genX(cmd_emit_conditional_render_predicate)(cmd_buffer);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, true);
cmd_buffer_pre_draw_wa(cmd_buffer);
anv_batch_emit(&cmd_buffer->batch, _3DPRIMITIVE_DIRECT, prim) {
prim.PredicateEnable = cmd_buffer->state.conditional_render_enabled;
@@ -1279,13 +1308,7 @@ void genX(CmdDrawIndexed)(
#endif
}
genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
cmd_buffer->device,
cmd_buffer->state.gfx.primitive_topology,
indexCount);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
update_dirty_vbs_for_gfx8_vb_flush(cmd_buffer, RANDOM);
cmd_buffer_post_draw_wa(cmd_buffer, indexCount, RANDOM);
trace_intel_end_draw_indexed(&cmd_buffer->trace, count);
}
@@ -1340,8 +1363,8 @@ void genX(CmdDrawMultiIndexedEXT)(
"draw indexed multi",
count);
trace_intel_begin_draw_indexed_multi(&cmd_buffer->trace);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device,
true);
cmd_buffer_pre_draw_wa(cmd_buffer);
anv_batch_emit(&cmd_buffer->batch, GENX(3DPRIMITIVE), prim) {
prim.PredicateEnable = cmd_buffer->state.conditional_render_enabled;
@@ -1354,14 +1377,10 @@ void genX(CmdDrawMultiIndexedEXT)(
prim.BaseVertexLocation = *pVertexOffset;
}
genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
cmd_buffer->device,
cmd_buffer->state.gfx.primitive_topology,
drawCount == 0 ? 0 :
pIndexInfo[drawCount - 1].indexCount);
cmd_buffer_post_draw_wa(cmd_buffer, drawCount == 0 ? 0 :
pIndexInfo[drawCount - 1].indexCount,
RANDOM);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device,
false);
trace_intel_end_draw_indexed_multi(&cmd_buffer->trace, count);
emitted = false;
}
@@ -1382,8 +1401,8 @@ void genX(CmdDrawMultiIndexedEXT)(
"draw indexed multi",
count);
trace_intel_begin_draw_indexed_multi(&cmd_buffer->trace);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device,
true);
cmd_buffer_pre_draw_wa(cmd_buffer);
anv_batch_emit(&cmd_buffer->batch, GENX(3DPRIMITIVE), prim) {
prim.PredicateEnable = cmd_buffer->state.conditional_render_enabled;
@@ -1396,14 +1415,10 @@ void genX(CmdDrawMultiIndexedEXT)(
prim.BaseVertexLocation = *pVertexOffset;
}
genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
cmd_buffer->device,
cmd_buffer->state.gfx.primitive_topology,
drawCount == 0 ? 0 :
pIndexInfo[drawCount - 1].indexCount);
cmd_buffer_post_draw_wa(cmd_buffer, drawCount == 0 ? 0 :
pIndexInfo[drawCount - 1].indexCount,
RANDOM);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device,
false);
trace_intel_end_draw_indexed_multi(&cmd_buffer->trace, count);
}
}
@@ -1420,7 +1435,8 @@ void genX(CmdDrawMultiIndexedEXT)(
"draw indexed multi",
count);
trace_intel_begin_draw_indexed_multi(&cmd_buffer->trace);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, true);
cmd_buffer_pre_draw_wa(cmd_buffer);
anv_batch_emit(&cmd_buffer->batch, GENX(3DPRIMITIVE), prim) {
prim.PredicateEnable = cmd_buffer->state.conditional_render_enabled;
@@ -1433,26 +1449,15 @@ void genX(CmdDrawMultiIndexedEXT)(
prim.BaseVertexLocation = draw->vertexOffset;
}
genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
cmd_buffer->device,
cmd_buffer->state.gfx.primitive_topology,
drawCount == 0 ? 0 :
pIndexInfo[drawCount - 1].indexCount);
cmd_buffer_post_draw_wa(cmd_buffer, drawCount == 0 ? 0 :
pIndexInfo[drawCount - 1].indexCount,
RANDOM);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
trace_intel_end_draw_indexed_multi(&cmd_buffer->trace, count);
}
}
#else
vk_foreach_multi_draw_indexed(draw, i, pIndexInfo, drawCount, stride) {
/* Wa_1306463417, Wa_16011107343 - Send HS state for every primitive,
* first one was handled by cmd_buffer_flush_gfx_state.
*/
if (i && (INTEL_NEEDS_WA_1306463417 || INTEL_NEEDS_WA_16011107343))
genX(emit_hs)(cmd_buffer);
genX(emit_ds)(cmd_buffer);
const uint32_t count =
draw->indexCount * instanceCount * pipeline->instance_multiplier;
anv_measure_snapshot(cmd_buffer,
@@ -1460,7 +1465,8 @@ void genX(CmdDrawMultiIndexedEXT)(
"draw indexed multi",
count);
trace_intel_begin_draw_indexed_multi(&cmd_buffer->trace);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, true);
cmd_buffer_pre_draw_wa(cmd_buffer);
anv_batch_emit(&cmd_buffer->batch, GENX(3DPRIMITIVE_EXTENDED), prim) {
#if GFX_VERx10 >= 125
@@ -1480,18 +1486,13 @@ void genX(CmdDrawMultiIndexedEXT)(
prim.ExtendedParameter2 = i;
}
genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
cmd_buffer->device,
cmd_buffer->state.gfx.primitive_topology,
drawCount == 0 ? 0 :
pIndexInfo[drawCount - 1].indexCount);
cmd_buffer_post_draw_wa(cmd_buffer, drawCount == 0 ? 0 :
pIndexInfo[drawCount - 1].indexCount,
RANDOM);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
trace_intel_end_draw_indexed_multi(&cmd_buffer->trace, count);
}
#endif
update_dirty_vbs_for_gfx8_vb_flush(cmd_buffer, RANDOM);
}
/* Auto-Draw / Indirect Registers */
@@ -1592,7 +1593,8 @@ void genX(CmdDrawIndirectByteCountEXT)(
mi_store(&b, mi_reg32(GEN11_3DPRIM_XP_DRAW_ID), mi_imm(0));
#endif
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, true);
cmd_buffer_pre_draw_wa(cmd_buffer);
anv_batch_emit(&cmd_buffer->batch, _3DPRIMITIVE_DIRECT, prim) {
#if GFX_VERx10 >= 125
prim.TBIMREnable = cmd_buffer->state.gfx.dyn_state.use_tbimr;
@@ -1605,13 +1607,7 @@ void genX(CmdDrawIndirectByteCountEXT)(
#endif
}
genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
cmd_buffer->device,
cmd_buffer->state.gfx.primitive_topology,
1);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
update_dirty_vbs_for_gfx8_vb_flush(cmd_buffer, SEQUENTIAL);
cmd_buffer_post_draw_wa(cmd_buffer, 1, SEQUENTIAL);
trace_intel_end_draw_indirect_byte_count(&cmd_buffer->trace,
instanceCount * pipeline->instance_multiplier);
@@ -1753,16 +1749,10 @@ emit_indirect_draws(struct anv_cmd_buffer *cmd_buffer,
*/
genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer);
/* Wa_1306463417, Wa_16011107343 - Send HS state for every primitive,
* first one was handled by cmd_buffer_flush_gfx_state.
*/
if (i && (INTEL_NEEDS_WA_1306463417 || INTEL_NEEDS_WA_16011107343))
genX(emit_hs)(cmd_buffer);
genX(emit_ds)(cmd_buffer);
load_indirect_parameters(cmd_buffer, draw, indexed, i);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, true);
cmd_buffer_pre_draw_wa(cmd_buffer);
anv_batch_emit(&cmd_buffer->batch, _3DPRIMITIVE_DIRECT, prim) {
#if GFX_VERx10 >= 125
prim.TBIMREnable = cmd_buffer->state.gfx.dyn_state.use_tbimr;
@@ -1775,14 +1765,7 @@ emit_indirect_draws(struct anv_cmd_buffer *cmd_buffer,
#endif
}
genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
cmd_buffer->device,
cmd_buffer->state.gfx.primitive_topology,
1);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
update_dirty_vbs_for_gfx8_vb_flush(cmd_buffer, indexed ? RANDOM : SEQUENTIAL);
cmd_buffer_post_draw_wa(cmd_buffer, 1, indexed ? RANDOM : SEQUENTIAL);
offset += indirect_data_stride;
}
@@ -1880,7 +1863,9 @@ genX(cmd_buffer_emit_execute_indirect_draws)(struct anv_cmd_buffer *cmd_buffer,
uint32_t offset = 0;
for (uint32_t i = 0; i < max_draw_count; i++) {
struct anv_address draw = anv_address_add(indirect_data_addr, offset);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, true);
cmd_buffer_pre_draw_wa(cmd_buffer);
anv_batch_emit(&cmd_buffer->batch, GENX(EXECUTE_INDIRECT_DRAW), ind) {
ind.ArgumentFormat = xi_argument_format_for_vk_cmd(cmd);
ind.TBIMREnabled = cmd_buffer->state.gfx.dyn_state.use_tbimr;
@@ -1895,11 +1880,8 @@ genX(cmd_buffer_emit_execute_indirect_draws)(struct anv_cmd_buffer *cmd_buffer,
}
genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
cmd_buffer->device,
cmd_buffer->state.gfx.primitive_topology,
1);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
cmd_buffer_post_draw_wa(cmd_buffer, 1,
0 /* Doesn't matter for GFX_VER > 9 */);
/* If all the indirect structures are aligned, then we can let the HW
* do the unrolling and we only need one instruction. Otherwise we
@@ -2139,14 +2121,8 @@ emit_indirect_count_draws(struct anv_cmd_buffer *cmd_buffer,
load_indirect_parameters(cmd_buffer, draw, indexed, i);
/* Wa_1306463417, Wa_16011107343 - Send HS state for every primitive,
* first one was handled by cmd_buffer_flush_gfx_state.
*/
if (i && (INTEL_NEEDS_WA_1306463417 || INTEL_NEEDS_WA_16011107343))
genX(emit_hs)(cmd_buffer);
genX(emit_ds)(cmd_buffer);
cmd_buffer_pre_draw_wa(cmd_buffer);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, true);
anv_batch_emit(&cmd_buffer->batch, _3DPRIMITIVE_DIRECT, prim) {
#if GFX_VERx10 >= 125
prim.TBIMREnable = cmd_buffer->state.gfx.dyn_state.use_tbimr;
@@ -2159,13 +2135,7 @@ emit_indirect_count_draws(struct anv_cmd_buffer *cmd_buffer,
#endif
}
genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
cmd_buffer->device,
cmd_buffer->state.gfx.primitive_topology,
1);
genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
update_dirty_vbs_for_gfx8_vb_flush(cmd_buffer, SEQUENTIAL);
cmd_buffer_post_draw_wa(cmd_buffer, 1, SEQUENTIAL);
}
mi_value_unref(&b, max);