ac,radeonsi/vcn: Use correct swizzle_mode for vcn4

On VCN4 SWIZZLE_MODE_8x8_1D_THIN_12_24BPP use different value
than previous VCN generations

Signed-off-by: Yinjie Yao <yinjie.yao@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36775>
This commit is contained in:
Yinjie Yao
2025-08-13 17:52:09 -04:00
committed by Marge Bot
parent 0aef7ede1e
commit 4cb6094f2e
2 changed files with 2 additions and 1 deletions
+1
View File
@@ -197,6 +197,7 @@
#define RENCODE_REC_SWIZZLE_MODE_256B_S 1
#define RENCODE_REC_SWIZZLE_MODE_256B_D 2
#define RENCODE_REC_SWIZZLE_MODE_8x8_1D_THIN_12_24BPP 0x10000001
#define RENCODE_REC_SWIZZLE_MODE_8x8_1D_THIN_12_24BPP_VCN4 0x10000000
#define RENCODE_REC_SWIZZLE_MODE_256B_D_VCN5 1
#define RENCODE_VIDEO_BITSTREAM_BUFFER_MODE_LINEAR 0
@@ -644,7 +644,7 @@ static uint32_t radeon_enc_ref_swizzle_mode(struct radeon_encoder *enc)
{
/* return RENCODE_REC_SWIZZLE_MODE_LINEAR; for debugging purpose */
if (enc->enc_pic.bit_depth_luma_minus8 != 0)
return RENCODE_REC_SWIZZLE_MODE_8x8_1D_THIN_12_24BPP;
return RENCODE_REC_SWIZZLE_MODE_8x8_1D_THIN_12_24BPP_VCN4;
else
return RENCODE_REC_SWIZZLE_MODE_256B_D;
}