pvr: Update FWIF 3d and compute register structures

This matches changes made in FW 1.17.OS@6285007.

Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18440>
This commit is contained in:
Sarah Walker
2022-07-28 10:05:57 +01:00
committed by Marge Bot
parent 24e24e9a28
commit 4be56e5e3f
@@ -274,6 +274,12 @@ struct rogue_fwif_3d_regs {
/* Only used when feature GPU_MULTICORE_SUPPORT or BRN 47217 present. */
uint32_t isp_oclqry_stride;
/* Only used when feature ZLS_SUBTILE present. */
uint32_t isp_zls_pixels;
/* Only used when feature ISP_ZLS_D24_S8_PACKING_OGL_MODE present. */
uint32_t rgx_cr_blackpearl_fix;
/* All values below the ALIGN_ATTR(8) must be 64 bit. */
uint64_t ALIGN_ATTR(8) isp_scissor_base;
uint64_t isp_dbias_base;
@@ -282,9 +288,6 @@ struct rogue_fwif_3d_regs {
uint64_t isp_zload_store_base;
uint64_t isp_stencil_load_store_base;
/* Only used when feature ZLS_SUBTILE present. */
uint64_t isp_zls_pixels;
/*
* Only used when feature FBCDC_ALGORITHM present and value < 3 or feature
* FB_CDC_V4 present. Additionally, BRNs 48754, 60227, 72310 and 72311 must
@@ -302,9 +305,6 @@ struct rogue_fwif_3d_regs {
uint64_t pds_pr_bgnd[3U];
/* Only used when feature ISP_ZLS_D24_S8_PACKING_OGL_MODE present. */
uint64_t rgx_cr_blackpearl_fix;
/* Only used when BRN 62850 or 62865 present. */
uint64_t isp_dummy_stencil_store_base;
@@ -460,19 +460,9 @@ struct rogue_fwif_cmd_abort {
struct rogue_fwif_cdm_regs {
uint64_t tpu_border_colour_table;
/* Only used when feature TPU_DM_GLOBAL_REGISTERS present. */
uint64_t tpu_tag_cdm_ctrl;
/* Only used when feature CDM_USER_MODE_QUEUE present. */
uint64_t cdm_cb_queue;
/*
* Only used when feature CDM_USER_MODE_QUEUE is present and
* SUPPORT_TRUSTED_DEVICE is present and SUPPORT_SECURE_ALLOC_KM is not
* present.
*/
uint64_t cdm_cb_secure_queue;
/* Only used when feature CDM_USER_MODE_QUEUE present. */
uint64_t cdm_cb_base;
/* Only used when feature CDM_USER_MODE_QUEUE present. */
@@ -493,6 +483,11 @@ struct rogue_fwif_cdm_regs {
/* Only used when feature CLUSTER_GROUPING present. */
uint32_t compute_cluster;
/* Only used when feature TPU_DM_GLOBAL_REGISTERS present. */
uint32_t tpu_tag_cdm_ctrl;
uint32_t padding;
};
/**