AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

microsoft/compiler: Overlap patch and non-patch varyings so both are separately 0-indexed

Browse Source 
Also add tess factors to the list of sysvals that can cause vars to be sorted last.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14399>
This commit is contained in:
Jesse Natalie
2022-01-02 10:15:58 -08:00
committed by Marge Bot
parent b7da3f8647
commit 4bb4d0454d
2 changed files with 8 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/microsoft/compiler/dxil_nir.c
+6 -3
View File
@@ -1792,10 +1792,13 @@ dxil_reassign_driver_locations(nir_shader* s, nir_variable_mode modes,
nir_sort_variables_with_modes(s, variable_location_cmp, modes);
uint64_t result = 0;
unsigned driver_loc = 0;
unsigned driver_loc = 0, driver_patch_loc = 0;
nir_foreach_variable_with_modes(var, s, modes) {
result |= 1ull << var->data.location;
var->data.driver_location = driver_loc++;
if (var->data.location < 64)
result |= 1ull << var->data.location;
/* Overlap patches with non-patch */
var->data.driver_location = var->data.patch ?
driver_patch_loc++ : driver_loc++;
}
return result;
}
src/microsoft/compiler/nir_to_dxil.c
+2
View File
@@ -5511,6 +5511,8 @@ nir_var_to_dxil_sysvalue_type(nir_variable *var, uint64_t other_stage_mask)
case VARYING_SLOT_CLIP_DIST0:
case VARYING_SLOT_CLIP_DIST1:
case VARYING_SLOT_PSIZ:
case VARYING_SLOT_TESS_LEVEL_INNER:
case VARYING_SLOT_TESS_LEVEL_OUTER:
if (!((1ull << var->data.location) & other_stage_mask))
return DXIL_SYSVALUE;
FALLTHROUGH;