zink: store base-object of DSA-state
This is useful in the next commit, where we need to inspect the base-state. Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6853>
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@@ -202,7 +202,7 @@ zink_blit(struct pipe_context *pctx,
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}
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util_blitter_save_blend(ctx->blitter, ctx->gfx_pipeline_state.blend_state);
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util_blitter_save_depth_stencil_alpha(ctx->blitter, ctx->gfx_pipeline_state.depth_stencil_alpha_state);
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util_blitter_save_depth_stencil_alpha(ctx->blitter, ctx->dsa_state);
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util_blitter_save_vertex_elements(ctx->blitter, ctx->element_state);
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util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref);
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util_blitter_save_rasterizer(ctx->blitter, ctx->rast_state);
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@@ -89,6 +89,7 @@ struct zink_context {
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struct zink_vertex_elements_state *element_state;
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struct zink_rasterizer_state *rast_state;
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struct zink_depth_stencil_alpha_state *dsa_state;
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struct zink_shader *gfx_stages[ZINK_SHADER_COUNT];
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struct zink_gfx_pipeline_state gfx_pipeline_state;
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@@ -49,7 +49,7 @@ struct zink_gfx_pipeline_state {
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struct zink_rasterizer_hw_state *rast_state;
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struct zink_depth_stencil_alpha_state *depth_stencil_alpha_state;
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struct zink_depth_stencil_alpha_hw_state *depth_stencil_alpha_state;
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VkSampleMask sample_mask;
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uint8_t rast_samples;
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@@ -334,28 +334,30 @@ zink_create_depth_stencil_alpha_state(struct pipe_context *pctx,
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if (!cso)
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return NULL;
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cso->base = *depth_stencil_alpha;
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if (depth_stencil_alpha->depth.enabled) {
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cso->depth_test = VK_TRUE;
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cso->depth_compare_op = compare_op(depth_stencil_alpha->depth.func);
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cso->hw_state.depth_test = VK_TRUE;
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cso->hw_state.depth_compare_op = compare_op(depth_stencil_alpha->depth.func);
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}
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if (depth_stencil_alpha->depth.bounds_test) {
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cso->depth_bounds_test = VK_TRUE;
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cso->min_depth_bounds = depth_stencil_alpha->depth.bounds_min;
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cso->max_depth_bounds = depth_stencil_alpha->depth.bounds_max;
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cso->hw_state.depth_bounds_test = VK_TRUE;
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cso->hw_state.min_depth_bounds = depth_stencil_alpha->depth.bounds_min;
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cso->hw_state.max_depth_bounds = depth_stencil_alpha->depth.bounds_max;
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}
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if (depth_stencil_alpha->stencil[0].enabled) {
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cso->stencil_test = VK_TRUE;
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cso->stencil_front = stencil_op_state(depth_stencil_alpha->stencil);
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cso->hw_state.stencil_test = VK_TRUE;
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cso->hw_state.stencil_front = stencil_op_state(depth_stencil_alpha->stencil);
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}
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if (depth_stencil_alpha->stencil[1].enabled)
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cso->stencil_back = stencil_op_state(depth_stencil_alpha->stencil + 1);
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cso->hw_state.stencil_back = stencil_op_state(depth_stencil_alpha->stencil + 1);
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else
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cso->stencil_back = cso->stencil_front;
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cso->hw_state.stencil_back = cso->hw_state.stencil_front;
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cso->depth_write = depth_stencil_alpha->depth.writemask;
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cso->hw_state.depth_write = depth_stencil_alpha->depth.writemask;
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return cso;
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}
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@@ -363,11 +365,16 @@ zink_create_depth_stencil_alpha_state(struct pipe_context *pctx,
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static void
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zink_bind_depth_stencil_alpha_state(struct pipe_context *pctx, void *cso)
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{
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struct zink_gfx_pipeline_state* state = &zink_context(pctx)->gfx_pipeline_state;
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struct zink_context *ctx = zink_context(pctx);
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if (state->depth_stencil_alpha_state != cso) {
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state->depth_stencil_alpha_state = cso;
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state->hash = 0;
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ctx->dsa_state = cso;
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if (cso) {
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struct zink_gfx_pipeline_state *state = &ctx->gfx_pipeline_state;
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if (state->depth_stencil_alpha_state != &ctx->dsa_state->hw_state) {
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state->depth_stencil_alpha_state = &ctx->dsa_state->hw_state;
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state->hash = 0;
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}
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}
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}
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@@ -71,7 +71,7 @@ struct zink_blend_state {
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bool need_blend_constants;
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};
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struct zink_depth_stencil_alpha_state {
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struct zink_depth_stencil_alpha_hw_state {
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VkBool32 depth_test;
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VkCompareOp depth_compare_op;
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@@ -85,6 +85,11 @@ struct zink_depth_stencil_alpha_state {
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VkBool32 depth_write;
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};
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struct zink_depth_stencil_alpha_state {
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struct pipe_depth_stencil_alpha_state base;
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struct zink_depth_stencil_alpha_hw_state hw_state;
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};
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void
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zink_context_state_init(struct pipe_context *pctx);
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