zink: store base-object of DSA-state

This is useful in the next commit, where we need to inspect the
base-state.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6853>
This commit is contained in:
Erik Faye-Lund
2020-09-24 22:20:53 +02:00
committed by Marge Bot
parent 9e94dcca67
commit 4b2525b68d
5 changed files with 30 additions and 17 deletions
+1 -1
View File
@@ -202,7 +202,7 @@ zink_blit(struct pipe_context *pctx,
}
util_blitter_save_blend(ctx->blitter, ctx->gfx_pipeline_state.blend_state);
util_blitter_save_depth_stencil_alpha(ctx->blitter, ctx->gfx_pipeline_state.depth_stencil_alpha_state);
util_blitter_save_depth_stencil_alpha(ctx->blitter, ctx->dsa_state);
util_blitter_save_vertex_elements(ctx->blitter, ctx->element_state);
util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref);
util_blitter_save_rasterizer(ctx->blitter, ctx->rast_state);
+1
View File
@@ -89,6 +89,7 @@ struct zink_context {
struct zink_vertex_elements_state *element_state;
struct zink_rasterizer_state *rast_state;
struct zink_depth_stencil_alpha_state *dsa_state;
struct zink_shader *gfx_stages[ZINK_SHADER_COUNT];
struct zink_gfx_pipeline_state gfx_pipeline_state;
+1 -1
View File
@@ -49,7 +49,7 @@ struct zink_gfx_pipeline_state {
struct zink_rasterizer_hw_state *rast_state;
struct zink_depth_stencil_alpha_state *depth_stencil_alpha_state;
struct zink_depth_stencil_alpha_hw_state *depth_stencil_alpha_state;
VkSampleMask sample_mask;
uint8_t rast_samples;
+21 -14
View File
@@ -334,28 +334,30 @@ zink_create_depth_stencil_alpha_state(struct pipe_context *pctx,
if (!cso)
return NULL;
cso->base = *depth_stencil_alpha;
if (depth_stencil_alpha->depth.enabled) {
cso->depth_test = VK_TRUE;
cso->depth_compare_op = compare_op(depth_stencil_alpha->depth.func);
cso->hw_state.depth_test = VK_TRUE;
cso->hw_state.depth_compare_op = compare_op(depth_stencil_alpha->depth.func);
}
if (depth_stencil_alpha->depth.bounds_test) {
cso->depth_bounds_test = VK_TRUE;
cso->min_depth_bounds = depth_stencil_alpha->depth.bounds_min;
cso->max_depth_bounds = depth_stencil_alpha->depth.bounds_max;
cso->hw_state.depth_bounds_test = VK_TRUE;
cso->hw_state.min_depth_bounds = depth_stencil_alpha->depth.bounds_min;
cso->hw_state.max_depth_bounds = depth_stencil_alpha->depth.bounds_max;
}
if (depth_stencil_alpha->stencil[0].enabled) {
cso->stencil_test = VK_TRUE;
cso->stencil_front = stencil_op_state(depth_stencil_alpha->stencil);
cso->hw_state.stencil_test = VK_TRUE;
cso->hw_state.stencil_front = stencil_op_state(depth_stencil_alpha->stencil);
}
if (depth_stencil_alpha->stencil[1].enabled)
cso->stencil_back = stencil_op_state(depth_stencil_alpha->stencil + 1);
cso->hw_state.stencil_back = stencil_op_state(depth_stencil_alpha->stencil + 1);
else
cso->stencil_back = cso->stencil_front;
cso->hw_state.stencil_back = cso->hw_state.stencil_front;
cso->depth_write = depth_stencil_alpha->depth.writemask;
cso->hw_state.depth_write = depth_stencil_alpha->depth.writemask;
return cso;
}
@@ -363,11 +365,16 @@ zink_create_depth_stencil_alpha_state(struct pipe_context *pctx,
static void
zink_bind_depth_stencil_alpha_state(struct pipe_context *pctx, void *cso)
{
struct zink_gfx_pipeline_state* state = &zink_context(pctx)->gfx_pipeline_state;
struct zink_context *ctx = zink_context(pctx);
if (state->depth_stencil_alpha_state != cso) {
state->depth_stencil_alpha_state = cso;
state->hash = 0;
ctx->dsa_state = cso;
if (cso) {
struct zink_gfx_pipeline_state *state = &ctx->gfx_pipeline_state;
if (state->depth_stencil_alpha_state != &ctx->dsa_state->hw_state) {
state->depth_stencil_alpha_state = &ctx->dsa_state->hw_state;
state->hash = 0;
}
}
}
+6 -1
View File
@@ -71,7 +71,7 @@ struct zink_blend_state {
bool need_blend_constants;
};
struct zink_depth_stencil_alpha_state {
struct zink_depth_stencil_alpha_hw_state {
VkBool32 depth_test;
VkCompareOp depth_compare_op;
@@ -85,6 +85,11 @@ struct zink_depth_stencil_alpha_state {
VkBool32 depth_write;
};
struct zink_depth_stencil_alpha_state {
struct pipe_depth_stencil_alpha_state base;
struct zink_depth_stencil_alpha_hw_state hw_state;
};
void
zink_context_state_init(struct pipe_context *pctx);