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radv: only emit SQ_PERFCOUNTER_MASK on GFX7-9

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This register doesn't exist on GFX10-10.3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29545>
This commit is contained in:
Samuel Pitoiset
2024-06-04 18:33:17 +02:00
parent 96e7ac027c
commit 4a75b50eb8
1 changed files with 2 additions and 0 deletions
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src/amd/vulkan/radv_perfcounter.c
+2
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@@ -21,6 +21,8 @@ radv_perfcounter_emit_shaders(struct radv_device *device, struct radeon_cmdbuf *
if (pdev->info.gfx_level >= GFX11) {
radeon_set_uconfig_reg(cs, R_036760_SQG_PERFCOUNTER_CTRL, shaders & 0x7f);
} else if (pdev->info.gfx_level >= GFX10) {
radeon_set_uconfig_reg(cs, R_036780_SQ_PERFCOUNTER_CTRL, shaders & 0x7f);
} else {
radeon_set_uconfig_reg_seq(cs, R_036780_SQ_PERFCOUNTER_CTRL, 2);
radeon_emit(cs, shaders & 0x7f);