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r300: fix writemask rewrite when converting to omod

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Consider the following case:
  0: MUL temp[1].y, input[0]._x__, input[1]._y__;
  1: MOV temp[1].x, input[0].x___;
  2: MOV temp[1].z, const[0].__x_;
  3: MUL temp[2].xyz, const[1].xxx_, temp[1].yxz_;
  ...

We correctly recognize that we can convert mul into omod for all three
instructions, however the mul swizzle was not handled correctly:
  0: MUL temp[2].y / 2, input[0]._x__, input[1]._y__;
  1: MOV temp[2].x / 2, input[0].x___;
  2: MOV temp[2].z / 2, const[0].__x_;
  ...

Just create the conversion swizzle from the initial mul swizzle when rewriting
the original instruction writemasks.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28784>
This commit is contained in:
Pavel Ondračka
2024-05-03 09:57:56 +02:00
parent 32cc2c2812
commit 472c64c90e
1 changed files with 6 additions and 3 deletions
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src/gallium/drivers/r300/compiler/radeon_optimize.c
+6 -3
View File
@@ -820,9 +820,12 @@ static int peephole_mul_omod(
/* Rewrite the instructions */
for (var = writer_list->Item; var; var = var->Friend) {
struct rc_variable * writer = var;
unsigned conversion_swizzle = rc_make_conversion_swizzle(
writemask_sum,
inst_mul->U.I.DstReg.WriteMask);
unsigned conversion_swizzle = RC_SWIZZLE_UUUU;
for (chan = 0; chan < 4; chan++) {
unsigned swz = GET_SWZ(inst_mul->U.I.SrcReg[temp_index].Swizzle, chan);
if (swz <= RC_SWIZZLE_W)
SET_SWZ(conversion_swizzle, swz, chan);
}
writer->Inst->U.I.Omod = omod_op;
writer->Inst->U.I.DstReg.File = inst_mul->U.I.DstReg.File;
writer->Inst->U.I.DstReg.Index = inst_mul->U.I.DstReg.Index;