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i965: drop brw->gt in favor of devinfo->gt

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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
This commit is contained in:
Lionel Landwerlin
2017-08-30 09:07:10 +01:00
parent b83a97a65d
commit 46213f676e
5 changed files with 5 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/mesa/drivers/dri/i965/brw_context.c
-1
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@@ -858,7 +858,6 @@ brwCreateContext(gl_api api,
brw->screen = screen;
brw->bufmgr = screen->bufmgr;
brw->gt = devinfo->gt;
brw->is_g4x = devinfo->is_g4x;
brw->is_baytrail = devinfo->is_baytrail;
brw->is_haswell = devinfo->is_haswell;
src/mesa/drivers/dri/i965/brw_context.h
-2
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@@ -746,8 +746,6 @@ struct brw_context
uint64_t max_gtt_map_object_size;
int gt;
bool is_g4x;
bool is_baytrail;
bool is_haswell;
src/mesa/drivers/dri/i965/brw_queryobj.c
+2 -2
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@@ -95,7 +95,7 @@ brw_write_timestamp(struct brw_context *brw, struct brw_bo *query_bo, int idx)
uint32_t flags = PIPE_CONTROL_WRITE_TIMESTAMP;
if (devinfo->gen == 9 && brw->gt == 4)
if (devinfo->gen == 9 && devinfo->gt == 4)
flags |= PIPE_CONTROL_CS_STALL;
brw_emit_pipe_control_write(brw, flags,
@@ -111,7 +111,7 @@ brw_write_depth_count(struct brw_context *brw, struct brw_bo *query_bo, int idx)
const struct gen_device_info *devinfo = &brw->screen->devinfo;
uint32_t flags = PIPE_CONTROL_WRITE_DEPTH_COUNT | PIPE_CONTROL_DEPTH_STALL;
if (devinfo->gen == 9 && brw->gt == 4)
if (devinfo->gen == 9 && devinfo->gt == 4)
flags |= PIPE_CONTROL_CS_STALL;
if (devinfo->gen >= 10) {
src/mesa/drivers/dri/i965/gen7_urb.c
+2 -2
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@@ -72,7 +72,7 @@ gen7_allocate_push_constants(struct brw_context *brw)
unsigned avail_size = 16;
unsigned multiplier =
(devinfo->gen >= 8 || (brw->is_haswell && brw->gt == 3)) ? 2 : 1;
(devinfo->gen >= 8 || (brw->is_haswell && devinfo->gt == 3)) ? 2 : 1;
int stages = 2 + gs_present + 2 * tess_present;
@@ -181,7 +181,7 @@ gen7_upload_urb(struct brw_context *brw, unsigned vs_size,
{
const struct gen_device_info *devinfo = &brw->screen->devinfo;
const int push_size_kB =
(devinfo->gen >= 8 || (brw->is_haswell && brw->gt == 3)) ? 32 : 16;
(devinfo->gen >= 8 || (brw->is_haswell && devinfo->gt == 3)) ? 32 : 16;
/* BRW_NEW_{VS,TCS,TES,GS}_PROG_DATA */
struct brw_vue_prog_data *prog_data[4] = {
src/mesa/drivers/dri/i965/genX_state_upload.c
+1 -1
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@@ -2551,7 +2551,7 @@ genX(upload_gs_state)(struct brw_context *brw)
* whole fixed function pipeline" means to emit a PIPE_CONTROL with the "CS
* Stall" bit set.
*/
if (brw->gt == 2 && brw->gs.enabled != active)
if (devinfo->gt == 2 && brw->gs.enabled != active)
gen7_emit_cs_stall_flush(brw);
#endif