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i965: Support textures with multiple planes

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Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Kristian Høgsberg Kristensen
2016-05-01 21:20:02 -07:00
committed by Kristian Høgsberg Kristensen
parent 3352f2d746
commit 44997fc0c1
7 changed files with 59 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/mesa/drivers/dri/i965/brw_compiler.h
+1
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@@ -327,6 +327,7 @@ struct brw_stage_prog_data {
uint32_t abo_start;
uint32_t image_start;
uint32_t shader_time_start;
uint32_t plane_start[3];
/** @} */
} binding_table;
src/mesa/drivers/dri/i965/brw_context.h
+1 -1
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@@ -726,7 +726,7 @@ struct brw_context
void (*update_texture_surface)(struct gl_context *ctx,
unsigned unit,
uint32_t *surf_offset,
bool for_gather);
bool for_gather, uint32_t plane);
uint32_t (*update_renderbuffer_surface)(struct brw_context *brw,
struct gl_renderbuffer *rb,
bool layered, unsigned unit,
src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+13
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@@ -4071,6 +4071,19 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
srcs[TEX_LOGICAL_SRC_MCS] = retype(src, BRW_REGISTER_TYPE_D);
break;
case nir_tex_src_plane: {
nir_const_value *const_plane =
nir_src_as_const_value(instr->src[i].src);
const uint32_t plane = const_plane->u32[0];
const uint32_t texture_index =
instr->texture_index +
stage_prog_data->binding_table.plane_start[plane] -
stage_prog_data->binding_table.texture_start;
srcs[TEX_LOGICAL_SRC_SURFACE] = brw_imm_ud(texture_index);
break;
}
default:
unreachable("unknown texture source");
}
src/mesa/drivers/dri/i965/brw_shader.cpp
+9
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@@ -1235,6 +1235,15 @@ brw_assign_common_binding_table_offsets(gl_shader_stage stage,
stage_prog_data->binding_table.pull_constants_start = next_binding_table_offset;
next_binding_table_offset++;
/* Plane 0 is just the regular texture section */
stage_prog_data->binding_table.plane_start[0] = stage_prog_data->binding_table.texture_start;
stage_prog_data->binding_table.plane_start[1] = next_binding_table_offset;
next_binding_table_offset += num_textures;
stage_prog_data->binding_table.plane_start[2] = next_binding_table_offset;
next_binding_table_offset += num_textures;
assert(next_binding_table_offset <= BRW_MAX_SURFACES);
/* prog_data->base.binding_table.size will be set by brw_mark_surface_used. */
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+22 -16
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@@ -316,7 +316,8 @@ static void
brw_update_texture_surface(struct gl_context *ctx,
unsigned unit,
uint32_t *surf_offset,
bool for_gather)
bool for_gather,
uint32_t plane)
{
struct brw_context *brw = brw_context(ctx);
struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
@@ -827,7 +828,7 @@ static void
update_stage_texture_surfaces(struct brw_context *brw,
const struct gl_program *prog,
struct brw_stage_state *stage_state,
bool for_gather)
bool for_gather, uint32_t plane)
{
if (!prog)
return;
@@ -840,7 +841,7 @@ update_stage_texture_surfaces(struct brw_context *brw,
if (for_gather)
surf_offset += stage_state->prog_data->binding_table.gather_texture_start;
else
surf_offset += stage_state->prog_data->binding_table.texture_start;
surf_offset += stage_state->prog_data->binding_table.plane_start[plane];
unsigned num_samplers = _mesa_fls(prog->SamplersUsed);
for (unsigned s = 0; s < num_samplers; s++) {
@@ -851,7 +852,7 @@ update_stage_texture_surfaces(struct brw_context *brw,
/* _NEW_TEXTURE */
if (ctx->Texture.Unit[unit]._Current) {
brw->vtbl.update_texture_surface(ctx, unit, surf_offset + s, for_gather);
brw->vtbl.update_texture_surface(ctx, unit, surf_offset + s, for_gather, plane);
}
}
}
@@ -878,26 +879,31 @@ brw_update_texture_surfaces(struct brw_context *brw)
struct gl_program *fs = (struct gl_program *) brw->fragment_program;
/* _NEW_TEXTURE */
update_stage_texture_surfaces(brw, vs, &brw->vs.base, false);
update_stage_texture_surfaces(brw, tcs, &brw->tcs.base, false);
update_stage_texture_surfaces(brw, tes, &brw->tes.base, false);
update_stage_texture_surfaces(brw, gs, &brw->gs.base, false);
update_stage_texture_surfaces(brw, fs, &brw->wm.base, false);
update_stage_texture_surfaces(brw, vs, &brw->vs.base, false, 0);
update_stage_texture_surfaces(brw, tcs, &brw->tcs.base, false, 0);
update_stage_texture_surfaces(brw, tes, &brw->tes.base, false, 0);
update_stage_texture_surfaces(brw, gs, &brw->gs.base, false, 0);
update_stage_texture_surfaces(brw, fs, &brw->wm.base, false, 0);
/* emit alternate set of surface state for gather. this
* allows the surface format to be overriden for only the
* gather4 messages. */
if (brw->gen < 8) {
if (vs && vs->UsesGather)
update_stage_texture_surfaces(brw, vs, &brw->vs.base, true);
update_stage_texture_surfaces(brw, vs, &brw->vs.base, true, 0);
if (tcs && tcs->UsesGather)
update_stage_texture_surfaces(brw, tcs, &brw->tcs.base, true);
update_stage_texture_surfaces(brw, tcs, &brw->tcs.base, true, 0);
if (tes && tes->UsesGather)
update_stage_texture_surfaces(brw, tes, &brw->tes.base, true);
update_stage_texture_surfaces(brw, tes, &brw->tes.base, true, 0);
if (gs && gs->UsesGather)
update_stage_texture_surfaces(brw, gs, &brw->gs.base, true);
update_stage_texture_surfaces(brw, gs, &brw->gs.base, true, 0);
if (fs && fs->UsesGather)
update_stage_texture_surfaces(brw, fs, &brw->wm.base, true);
update_stage_texture_surfaces(brw, fs, &brw->wm.base, true, 0);
}
if (fs) {
update_stage_texture_surfaces(brw, fs, &brw->wm.base, false, 1);
update_stage_texture_surfaces(brw, fs, &brw->wm.base, false, 2);
}
brw->ctx.NewDriverState |= BRW_NEW_SURFACES;
@@ -929,7 +935,7 @@ brw_update_cs_texture_surfaces(struct brw_context *brw)
struct gl_program *cs = (struct gl_program *) brw->compute_program;
/* _NEW_TEXTURE */
update_stage_texture_surfaces(brw, cs, &brw->cs.base, false);
update_stage_texture_surfaces(brw, cs, &brw->cs.base, false, 0);
/* emit alternate set of surface state for gather. this
* allows the surface format to be overriden for only the
@@ -937,7 +943,7 @@ brw_update_cs_texture_surfaces(struct brw_context *brw)
*/
if (brw->gen < 8) {
if (cs && cs->UsesGather)
update_stage_texture_surfaces(brw, cs, &brw->cs.base, true);
update_stage_texture_surfaces(brw, cs, &brw->cs.base, true, 0);
}
brw->ctx.NewDriverState |= BRW_NEW_SURFACES;
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+2 -1
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@@ -353,7 +353,8 @@ static void
gen7_update_texture_surface(struct gl_context *ctx,
unsigned unit,
uint32_t *surf_offset,
bool for_gather)
bool for_gather,
uint32_t plane)
{
struct brw_context *brw = brw_context(ctx);
struct gl_texture_object *obj = ctx->Texture.Unit[unit]._Current;
src/mesa/drivers/dri/i965/gen8_surface_state.c
+11 -1
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@@ -34,6 +34,7 @@
#include "intel_tex.h"
#include "intel_fbo.h"
#include "intel_buffer_objects.h"
#include "intel_image.h"
#include "brw_context.h"
#include "brw_state.h"
@@ -349,7 +350,8 @@ static void
gen8_update_texture_surface(struct gl_context *ctx,
unsigned unit,
uint32_t *surf_offset,
bool for_gather)
bool for_gather,
uint32_t plane)
{
struct brw_context *brw = brw_context(ctx);
struct gl_texture_object *obj = ctx->Texture.Unit[unit]._Current;
@@ -383,6 +385,14 @@ gen8_update_texture_surface(struct gl_context *ctx,
if (obj->StencilSampling && firstImage->_BaseFormat == GL_DEPTH_STENCIL) {
mt = mt->stencil_mt;
format = BRW_SURFACEFORMAT_R8_UINT;
} else if (obj->Target == GL_TEXTURE_EXTERNAL_OES) {
if (plane > 0)
mt = mt->plane[plane - 1];
if (mt == NULL)
return;
format = translate_tex_format(brw, mt->format, sampler->sRGBDecode);
}
const int surf_index = surf_offset - &brw->wm.base.surf_offset[0];