pan/bi: Set I->nr_dests, I->nr_srcs

The builder is the primary producer of instructions, and generally the shape of
an instruction is fixed at build-time. It must set nr_dests/nr_srcs
appropriately. Likewise, when we modify sources later, we need to update
nr_srcs/nr_dests to keep everything consistent (and keep the tests passing).

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17794>

src/panfrost/bifrost/bi_builder.h.py

@@ -94,6 +94,8 @@ bi_instr * bi_${opcode.replace('.', '_').lower()}${to_suffix(ops[opcode])}(${sig
 {
     bi_instr *I = rzalloc(b->shader, bi_instr);
     I->op = BI_OPCODE_${opcode.replace('.', '_').upper()};
+    I->nr_dests = ${ops[opcode]["dests"]};
+    I->nr_srcs = ${src_count(ops[opcode])};
 % for dest in range(ops[opcode]["dests"]):
     I->dest[${dest}] = dest${dest};
 % endfor

src/panfrost/bifrost/bi_opt_mod_props.c

@@ -145,6 +145,7 @@ bi_fuse_discard_fcmp(bi_instr *I, bi_instr *mod, unsigned arch)
         I->cmpf = mod->cmpf;
         I->src[0] = mod->src[0];
         I->src[1] = mod->src[1];
+        I->nr_srcs = 2;
 
         if (mod->op == BI_OPCODE_FCMP_V2F16) {
                 I->src[0].swizzle = bi_compose_swizzle_16(r, I->src[0].swizzle);
@@ -442,12 +443,14 @@ bi_lower_opt_instruction(bi_instr *I)
 
                 I->round = BI_ROUND_NONE;
                 I->src[1] = bi_negzero();
+                I->nr_srcs = 2;
                 break;
 
         case BI_OPCODE_DISCARD_B32:
                 I->op = BI_OPCODE_DISCARD_F32;
                 I->src[1] = bi_imm_u32(0);
                 I->cmpf = BI_CMPF_NE;
+                I->nr_srcs = 2;
                 break;
 
         default:

src/panfrost/bifrost/bi_schedule.c

@@ -329,9 +329,12 @@ bi_lower_cubeface(bi_context *ctx,
         pinstr->op = BI_OPCODE_CUBEFACE2;
         pinstr->dest[0] = pinstr->dest[1];
         pinstr->dest[1] = bi_null();
+        pinstr->nr_dests = 1;
+
         pinstr->src[0] = cubeface1->dest[0];
         pinstr->src[1] = bi_null();
         pinstr->src[2] = bi_null();
+        pinstr->nr_srcs = 1;
 
         return cubeface1;
 }
@@ -355,6 +358,7 @@ bi_lower_atom_c(bi_context *ctx, struct bi_clause_state *clause, struct
 
         pinstr->op = BI_OPCODE_ATOM_CX;
         pinstr->src[3] = atom_c->src[2];
+        pinstr->nr_srcs = 4;
 
         return atom_c;
 }
@@ -376,6 +380,7 @@ bi_lower_atom_c1(bi_context *ctx, struct bi_clause_state *clause, struct
         pinstr->src[1] = pinstr->src[0];
         pinstr->src[3] = bi_dontcare(&b);
         pinstr->src[0] = bi_null();
+        pinstr->nr_srcs = 4;
 
         return atom_c;
 }
@@ -393,6 +398,7 @@ bi_lower_seg_add(bi_context *ctx,
         pinstr->op = BI_OPCODE_SEG_ADD;
         pinstr->src[0] = pinstr->src[1];
         pinstr->src[1] = bi_null();
+        pinstr->nr_srcs = 1;
 
         assert(pinstr->dest[0].type == BI_INDEX_REGISTER);
         pinstr->dest[0].value += 1;
@@ -409,6 +415,7 @@ bi_lower_dtsel(bi_context *ctx,
 
         bi_instr *dtsel = bi_dtsel_imm_to(&b, bi_temp(b.shader),
                         add->src[0], add->table);
+        assert(add->nr_srcs >= 1);
         add->src[0] = dtsel->dest[0];
 
         assert(bi_supports_dtsel(add));
@@ -1289,6 +1296,7 @@ bi_take_instr(bi_context *ctx, struct bi_worklist st,
                 assert(bi_can_iaddc(instr));
                 instr->op = BI_OPCODE_IADDC_I32;
                 instr->src[2] = bi_zero();
+                instr->nr_srcs = 3;
         } else if (fma && bi_can_replace_with_csel(instr)) {
                 bi_replace_mux_with_csel(instr, false);
         }

src/panfrost/bifrost/bir.c

@@ -300,4 +300,5 @@ bi_replace_mux_with_csel(bi_instr *I, bool must_sign)
         I->src[1] = bi_zero();
         I->src[2] = vTrue;
         I->src[3] = vFalse;
+        I->nr_srcs = 4;
 }

src/panfrost/bifrost/valhall/va_lower_isel.c

@@ -34,26 +34,31 @@ va_lower_isel(bi_instr *I)
    case BI_OPCODE_SWZ_V2I16:
       I->op = BI_OPCODE_IADD_V2U16;
       I->src[1] = bi_zero();
+      I->nr_srcs = 2;
       break;
 
    case BI_OPCODE_SWZ_V4I8:
       I->op = BI_OPCODE_IADD_V4U8;
       I->src[1] = bi_zero();
+      I->nr_srcs = 2;
       break;
 
    case BI_OPCODE_ICMP_I32:
       I->op = BI_OPCODE_ICMP_OR_U32;
       I->src[2] = bi_zero();
+      I->nr_srcs = 3;
       break;
 
    case BI_OPCODE_ICMP_V2I16:
       I->op = BI_OPCODE_ICMP_OR_V2U16;
       I->src[2] = bi_zero();
+      I->nr_srcs = 3;
       break;
 
    case BI_OPCODE_ICMP_V4I8:
       I->op = BI_OPCODE_ICMP_OR_V4U8;
       I->src[2] = bi_zero();
+      I->nr_srcs = 3;
       break;
 
    case BI_OPCODE_ICMP_U32:
@@ -101,6 +106,7 @@ va_lower_isel(bi_instr *I)
    case BI_OPCODE_FCMP_V2F16:
       I->op = BI_OPCODE_FCMP_OR_V2F16;
       I->src[2] = bi_zero();
+      I->nr_srcs = 3;
       break;
 
    /* Integer CSEL must have a signedness */
@@ -117,6 +123,7 @@ va_lower_isel(bi_instr *I)
       I->op = I->branch_target ? BI_OPCODE_BRANCHZ_I16 : BI_OPCODE_BRANCHZI;
       I->src[1] = I->src[0];
       I->src[0] = bi_zero();
+      I->nr_srcs = 2;
       I->cmpf = BI_CMPF_EQ;
       break;
 
@@ -152,6 +159,7 @@ va_lower_isel(bi_instr *I)
       I->src[3] = I->src[2];
       I->src[2] = I->src[1];
       I->src[1] = bi_imm_f32(1.0);
+      I->nr_srcs = 4;
       break;
 
    default:

src/panfrost/bifrost/valhall/va_optimize.c

@@ -102,6 +102,7 @@ va_fuse_add_imm(bi_instr *I)
 
    I->src[0] = I->src[1 - s];
    I->src[1] = bi_null();
+   I->nr_srcs = 1;
 }
 
 void