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radv: stop emitting DB_COUNT_CONTROL in the GFX preamble

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This is already emitted as part of the occlusion query state and this
state is dirty when a cmdbuf begins.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30788>
This commit is contained in:
Samuel Pitoiset
2024-08-22 14:10:45 +02:00
committed by Marge Bot
parent e3e28bb514
commit 421c42170e
1 changed files with 0 additions and 4 deletions
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src/amd/vulkan/radv_queue.c
-4
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@@ -1153,10 +1153,6 @@ radv_emit_graphics(struct radv_device *device, struct radeon_cmdbuf *cs)
cs, R_028A04_PA_SU_POINT_MINMAX,
S_028A04_MIN_SIZE(radv_pack_float_12p4(0)) | S_028A04_MAX_SIZE(radv_pack_float_12p4(8191.875 / 2)));
if (!has_clear_state) {
radeon_set_context_reg(cs, R_028004_DB_COUNT_CONTROL, S_028004_ZPASS_INCREMENT_DISABLE(1));
}
/* Enable the Polaris small primitive filter control.
* XXX: There is possibly an issue when MSAA is off (see RadeonSI
* has_msaa_sample_loc_bug). But this doesn't seem to regress anything,