pvr: Implement WA BRN_72168

Signed-off-by: Ashish Chauhan <Ashish.Chauhan@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36412>
This commit is contained in:
Ashish Chauhan
2024-09-06 14:34:31 +01:00
committed by Marge Bot
parent a4d7b343c5
commit 3c83b0274d
3 changed files with 22 additions and 1 deletions
@@ -120,6 +120,7 @@ static const struct pvr_device_enhancements
static const struct pvr_device_quirks pvr_device_quirks_36_53_104_796 = {
.has_brn44079 = true,
.has_brn70165 = true,
.has_brn72168 = true,
};
static const struct pvr_device_info pvr_device_info_36_53_104_796 = {
+1
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@@ -363,6 +363,7 @@ struct pvr_device_quirks {
bool has_brn62269 : 1;
bool has_brn66011 : 1;
bool has_brn70165 : 1;
bool has_brn72168 : 1;
};
struct pvr_device_info {
+20 -1
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@@ -1118,8 +1118,10 @@ static void pvr_frag_state_stream_init(struct pvr_render_ctx *ctx,
const struct pvr_device_runtime_info *dev_runtime_info =
&pdevice->dev_runtime_info;
const struct pvr_device_info *dev_info = &pdevice->dev_info;
const struct pvr_rt_dataset *rt_dataset = job->rt_dataset;
const enum ROGUE_CR_ISP_AA_MODE_TYPE isp_aa_mode =
pvr_cr_isp_aa_mode_type(job->samples);
struct pvr_rt_mtile_info tiling_info = { 0 };
enum ROGUE_CR_ZLS_FORMAT_TYPE zload_format = ROGUE_CR_ZLS_FORMAT_TYPE_F32Z;
uint32_t *stream_ptr = (uint32_t *)state->fw_stream;
@@ -1332,6 +1334,11 @@ static void pvr_frag_state_stream_init(struct pvr_render_ctx *ctx,
}
stream_ptr += pvr_cmd_length(CR_ISP_AA);
pvr_rt_mtile_info_init(dev_info,
&tiling_info,
rt_dataset->width,
rt_dataset->height,
rt_dataset->samples);
pvr_csb_pack (stream_ptr, CR_ISP_CTL, value) {
value.sample_pos = true;
value.process_empty_tiles = job->process_empty_tiles;
@@ -1343,8 +1350,20 @@ static void pvr_frag_state_stream_init(struct pvr_render_ctx *ctx,
value.dbias_is_int = PVR_HAS_ERN(dev_info, 42307) &&
pvr_zls_format_type_is_int(job->ds.zls_format);
if (PVR_HAS_FEATURE(dev_info, gpu_multicore_support))
if (PVR_HAS_FEATURE(dev_info, gpu_multicore_support)) {
value.skip_init_hdrs = true;
if (PVR_HAS_QUIRK(dev_info, 72168)) {
/* x_tile_max is the 0-based index of the last 16x16 tile in a row.
* We cannot set SKIP_INIT_HDRS if the number of tile group rows is
* odd AND the width is <= 2 tiles.
*/
if (((((tiling_info.y_tile_max + 1) / 2) & 0x1) == 1) &&
(tiling_info.x_tile_max <= 1)) {
value.skip_init_hdrs = false;
}
}
}
}
/* FIXME: When pvr_setup_tiles_in_flight() is refactored it might be
* possible to fully pack CR_ISP_CTL above rather than having to OR in part