intel/brw: Hide register pressure information in dumps

It was the default to show register pressure for each instruction,
but it gets in the way of cleaner diffs before/after an optimization pass.
Add INTEL_DEBUG=reg-pressure option to show it again.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29114>
This commit is contained in:
Caio Oliveira
2024-05-08 13:38:39 -07:00
committed by Marge Bot
parent 866b1245e9
commit 3a081106b0
3 changed files with 12 additions and 4 deletions
+10 -4
View File
@@ -2177,15 +2177,20 @@ void
fs_visitor::dump_instructions_to_file(FILE *file) const
{
if (cfg && grf_used == 0) {
const register_pressure &rp = regpressure_analysis.require();
const register_pressure *rp =
INTEL_DEBUG(DEBUG_REG_PRESSURE) ? &regpressure_analysis.require() : NULL;
unsigned ip = 0, max_pressure = 0;
unsigned cf_count = 0;
foreach_block_and_inst(block, fs_inst, inst, cfg) {
if (inst->is_control_flow_end())
cf_count -= 1;
max_pressure = MAX2(max_pressure, rp.regs_live_at_ip[ip]);
fprintf(file, "{%3d} ", rp.regs_live_at_ip[ip]);
if (rp) {
max_pressure = MAX2(max_pressure, rp->regs_live_at_ip[ip]);
fprintf(file, "{%3d} ", rp->regs_live_at_ip[ip]);
}
for (unsigned i = 0; i < cf_count; i++)
fprintf(file, " ");
dump_instruction(inst, file);
@@ -2194,7 +2199,8 @@ fs_visitor::dump_instructions_to_file(FILE *file) const
if (inst->is_control_flow_begin())
cf_count += 1;
}
fprintf(file, "Maximum %3d registers live at once.\n", max_pressure);
if (rp)
fprintf(file, "Maximum %3d registers live at once.\n", max_pressure);
} else if (cfg && exec_list_is_empty(&instructions)) {
foreach_block_and_inst(block, fs_inst, inst, cfg) {
dump_instruction(inst, file);
+1
View File
@@ -105,6 +105,7 @@ static const struct debug_control debug_control[] = {
{ "sparse", DEBUG_SPARSE },
{ "draw_bkp", DEBUG_DRAW_BKP },
{ "bat-stats", DEBUG_BATCH_STATS },
{ "reg-pressure", DEBUG_REG_PRESSURE },
{ NULL, 0 }
};
+1
View File
@@ -96,6 +96,7 @@ extern uint64_t intel_debug;
#define DEBUG_SPARSE (1ull << 48)
#define DEBUG_DRAW_BKP (1ull << 49)
#define DEBUG_BATCH_STATS (1ull << 50)
#define DEBUG_REG_PRESSURE (1ull << 51)
#define DEBUG_ANY (~0ull)