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i915: Enable LOD preclamping on 8xx like on 915/965.

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Fixes lodclamp-between and lodclamp-between-max.
This commit is contained in:
Eric Anholt
2011-01-05 14:48:05 -08:00
parent 973e821a63
commit 39cc0ee3ea
2 changed files with 3 additions and 0 deletions
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src/mesa/drivers/dri/i915/i830_reg.h
+2
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@@ -585,6 +585,8 @@
#define TM0S2_VERITCAL_LINE_STRIDE_OFF (1<<12)
#define TM0S2_OUTPUT_CHAN_SHIFT 10
#define TM0S2_OUTPUT_CHAN_MASK (3<<10)
#define TM0S2_BASE_MIP_LEVEL_SHIFT 1
#define TM0S2_LOD_PRECLAMP (1 << 0)
#define TM0S3_MIP_FILTER_MASK (0x3<<30)
#define TM0S3_MIP_FILTER_SHIFT 30
src/mesa/drivers/dri/i915/i830_texstate.c
+1
View File
@@ -266,6 +266,7 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
maxlod_fixed = U_FIXED(CLAMP(maxlod, 0.0, 11.75), 2);
maxlod_fixed = MAX2(maxlod_fixed, (minlod_fixed + 3) >> 2);
state[I830_TEXREG_TM0S3] |= maxlod_fixed << TM0S3_MIN_MIP_SHIFT;
state[I830_TEXREG_TM0S2] |= TM0S2_LOD_PRECLAMP;
} else {
maxlod_fixed = U_FIXED(CLAMP(maxlod, 0.0, 11), 0);
maxlod_fixed = MAX2(maxlod_fixed, (minlod_fixed + 15) >> 4);