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radeonsi/vcn: use calculated max hierarchy depth for hevc enc

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Certain player has hard coded max_transform_hierarchy_depth_inter and
max_transform_hierarchy_depth_intra values set through VA-API, which
doesn't work on radeon HW. Until properly fixing it on player side,
temporarily adding this workaround to use calculated values instead.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17489>
This commit is contained in:
Boyuan Zhang
2022-07-12 12:11:41 -04:00
committed by Marge Bot
parent 13e73e39cc
commit 3962555db8
1 changed files with 9 additions and 2 deletions
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src/gallium/drivers/radeonsi/radeon_vcn_enc.c
+9 -2
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@@ -142,10 +142,17 @@ static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_pic
pic->seq.log2_min_transform_block_size_minus2;
enc->enc_pic.log2_diff_max_min_transform_block_size =
pic->seq.log2_diff_max_min_transform_block_size;
/* To fix incorrect hardcoded values set by player
* log2_diff_max_min_luma_coding_block_size = log2(64) - (log2_min_luma_coding_block_size_minus3 + 3)
* max_transform_hierarchy_depth_inter = log2_diff_max_min_luma_coding_block_size + 1
* max_transform_hierarchy_depth_intra = log2_diff_max_min_luma_coding_block_size + 1
*/
enc->enc_pic.max_transform_hierarchy_depth_inter =
pic->seq.max_transform_hierarchy_depth_inter;
6 - (pic->seq.log2_min_luma_coding_block_size_minus3 + 3) + 1;
enc->enc_pic.max_transform_hierarchy_depth_intra =
pic->seq.max_transform_hierarchy_depth_intra;
enc->enc_pic.max_transform_hierarchy_depth_inter;
enc->enc_pic.log2_parallel_merge_level_minus2 = pic->pic.log2_parallel_merge_level_minus2;
enc->enc_pic.bit_depth_luma_minus8 = pic->seq.bit_depth_luma_minus8;
enc->enc_pic.bit_depth_chroma_minus8 = pic->seq.bit_depth_chroma_minus8;