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winsys/amdgpu: initialize IB_PREAMBLE in advance

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Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16509>
This commit is contained in:
Marek Olšák
2022-05-14 21:16:31 -04:00
committed by Marge Bot
parent 1fdc3b0fde
commit 394e42427f
1 changed files with 6 additions and 3 deletions
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src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+6 -3
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@@ -873,14 +873,19 @@ static bool amdgpu_init_cs_context(struct amdgpu_winsys *ws,
* the next IB starts drawing, and so the cache flush at the end of IB
* is always late.
*/
if (ws->info.drm_minor >= 26)
if (ws->info.drm_minor >= 26) {
cs->ib[IB_PREAMBLE].flags = AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE;
cs->ib[IB_MAIN].flags = AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE;
}
break;
default:
assert(0);
}
cs->ib[IB_PREAMBLE].flags |= AMDGPU_IB_FLAG_PREAMBLE;
cs->ib[IB_PREAMBLE].ip_type = cs->ib[IB_MAIN].ip_type;
cs->last_added_bo = NULL;
return true;
}
@@ -1047,8 +1052,6 @@ amdgpu_cs_setup_preemption(struct radeon_cmdbuf *rcs, const uint32_t *preamble_i
amdgpu_bo_unmap(&ws->dummy_ws.base, preamble_bo);
for (unsigned i = 0; i < 2; i++) {
csc[i]->ib[IB_PREAMBLE] = csc[i]->ib[IB_MAIN];
csc[i]->ib[IB_PREAMBLE].flags |= AMDGPU_IB_FLAG_PREAMBLE;
csc[i]->ib[IB_PREAMBLE].va_start = amdgpu_winsys_bo(preamble_bo)->va;
csc[i]->ib[IB_PREAMBLE].ib_bytes = preamble_num_dw * 4;