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turnip: disable LRZ on specific cases

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There are depth compare op modes that are not supported by LRZ in the
HW. Also, it is not supported when blend or stencil are enabled.

v2:

* Set pipeline->lrz.write to the same value than depthWriteEnable.
* Improve comment on disabling LRZ write on blend.
* Remove pipeline's lrz invalidation when there is no clear mask in
render pass. It is confusing. (Jonathan Marek)
* Mark the pipeline state as changed.
* Add comment on not using GREATER flag.

v3:

* Replace {rb,gras}_lrz_cntl by flags in struct tu_pipeline.
* Added z_test_enable flag.

v4:

* Created struct tu_lrz_pipeline to avoid modifying immutable objects.

v5:

* Fixed crashes when pDepthStencilState pointer is NULL.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
This commit is contained in:
Samuel Iglesias Gonsálvez
2020-05-19 17:19:29 +02:00
committed by Marge Bot
parent 6089b00e89
commit 38f008e07b
2 changed files with 53 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/freedreno/vulkan/tu_pipeline.c
+41
View File
@@ -2495,6 +2495,47 @@ tu_pipeline_builder_parse_depth_stencil(struct tu_pipeline_builder *builder,
tu_cs_emit_regs(&cs, A6XX_RB_STENCILREF(.ref = ds_info->front.reference & 0xff,
.bfref = ds_info->back.reference & 0xff));
}
if (ds_info->depthTestEnable) {
pipeline->lrz.write = ds_info->depthWriteEnable;
pipeline->lrz.invalidate = false;
pipeline->lrz.z_test_enable = true;
/* LRZ does not support some depth modes.
*
* The HW has a flag for GREATER and GREATER_OR_EQUAL modes which is used
* in freedreno, however there are some dEQP-VK tests that fail if we use here.
* Furthermore, blob disables LRZ on these comparison opcodes too.
*
* TODO: investigate if we can enable GREATER flag here.
*/
switch(ds_info->depthCompareOp) {
case VK_COMPARE_OP_ALWAYS:
case VK_COMPARE_OP_NOT_EQUAL:
case VK_COMPARE_OP_GREATER:
case VK_COMPARE_OP_GREATER_OR_EQUAL:
pipeline->lrz.invalidate = true;
pipeline->lrz.write = false;
break;
case VK_COMPARE_OP_EQUAL:
case VK_COMPARE_OP_NEVER:
pipeline->lrz.enable = true;
pipeline->lrz.write = false;
break;
case VK_COMPARE_OP_LESS:
case VK_COMPARE_OP_LESS_OR_EQUAL:
pipeline->lrz.enable = true;
break;
default:
unreachable("bad VK_COMPARE_OP value");
break;
};
}
if (ds_info->stencilTestEnable) {
pipeline->lrz.write = false;
pipeline->lrz.invalidate = true;
}
}
static void
src/freedreno/vulkan/tu_private.h
+12
View File
@@ -837,6 +837,16 @@ struct tu_cache_state {
enum tu_cmd_flush_bits flush_bits;
};
struct tu_lrz_pipeline
{
bool write : 1;
bool invalidate : 1;
bool enable : 1;
bool greater : 1;
bool z_test_enable : 1;
};
struct tu_cmd_state
{
uint32_t dirty;
@@ -1116,6 +1126,8 @@ struct tu_pipeline
{
uint32_t local_size[3];
} compute;
struct tu_lrz_pipeline lrz;
};
void