etnaviv: allow larger shaders with unified instruction memory
When the core supports unified instruction memory, don't clamp individual shader sizes to 256 instructions. Allow shaders to make full use of the state instruction memory, as long as both VS and FS fit into the memory region. Allows to run the shaders from glmark2 terrain from state instruction memory, so we don't need to use icache mode on GC3000 and makes the app work on GC2000, which doesn't have icache but unified instruction memory. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33229>
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@@ -878,19 +878,19 @@ etna_get_specs(struct etna_screen *screen)
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* same.
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*/
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screen->specs.ps_offset = 0x8000;
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screen->specs.max_instructions = 256; /* maximum number instructions for non-icache use */
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/* maximum number instructions for non-icache use */
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screen->specs.max_instructions = instruction_count;
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screen->specs.has_icache = true;
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} else {
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if (instruction_count > 256) {
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/* unified instruction states */
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screen->specs.vs_offset = 0xC000;
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screen->specs.ps_offset = 0xC000;
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screen->specs.max_instructions = 256;
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} else {
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screen->specs.vs_offset = 0x4000;
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screen->specs.ps_offset = 0x6000;
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screen->specs.max_instructions = instruction_count;
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}
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screen->specs.max_instructions = instruction_count;
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screen->specs.has_icache = false;
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}
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@@ -284,7 +284,13 @@ etna_link_shaders(struct etna_context *ctx, struct compiled_shader_state *cs,
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cs->ps_inst_mem_size = fs->code_size;
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cs->PS_INST_MEM = fs->code;
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if (vs->needs_icache || fs->needs_icache) {
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if (vs->needs_icache || fs->needs_icache ||
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(ctx->screen->specs.has_unified_instmem &&
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((cs->vs_inst_mem_size + cs->ps_inst_mem_size) / 4 >
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ctx->screen->specs.max_instructions))) {
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if (!ctx->screen->specs.has_icache)
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return false;
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/* If either of the shaders needs ICACHE, we use it for both. It is
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* either switched on or off for the entire shader processor.
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*/
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