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anv/cmd_buffer: Manage Anv state around HZ op emission

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Move the assignment to a less surprising location.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Nanley Chery
2016-09-28 15:51:35 -07:00
parent 6ff4c24fdd
commit 37c07d64b4
1 changed files with 9 additions and 7 deletions
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16
src/intel/vulkan/gen8_cmd_buffer.c
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@@ -455,9 +455,6 @@ genX(cmd_buffer_emit_hz_op)(struct anv_cmd_buffer *cmd_buffer,
hzp.FullSurfaceDepthandStencilClear = full_surface_op;
hzp.StencilClearValue =
cmd_state->attachments[ds].clear_value.depthStencil.stencil & 0xff;
/* Mark aspects as cleared */
cmd_state->attachments[ds].pending_clear_aspects = 0;
break;
case BLORP_HIZ_OP_DEPTH_RESOLVE:
hzp.DepthBufferResolveEnable = true;
@@ -506,11 +503,16 @@ genX(cmd_buffer_emit_hz_op)(struct anv_cmd_buffer *cmd_buffer,
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_WM_HZ_OP), hzp);
if (!full_surface_op && op == BLORP_HIZ_OP_DEPTH_CLEAR) {
anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
pc.DepthStallEnable = true;
pc.DepthCacheFlushEnable = true;
if (op == BLORP_HIZ_OP_DEPTH_CLEAR) {
if (!full_surface_op) {
anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
pc.DepthStallEnable = true;
pc.DepthCacheFlushEnable = true;
}
}
/* Mark aspects as cleared */
cmd_state->attachments[ds].pending_clear_aspects = 0;
}
}