aco: fix GS with no outputs
With NGG, ngg_gs_known_vtxcnt[0] would be false and ngg_gs_finale() would assert. With legacy GS, I don't know why the assertion was there. Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7576>
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@@ -7020,7 +7020,7 @@ void ngg_gs_write_shader_query(isel_context *ctx, nir_intrinsic_instr *instr);
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void ngg_visit_set_vertex_and_primitive_count(isel_context *ctx, nir_intrinsic_instr *instr)
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{
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unsigned stream = nir_intrinsic_stream_id(instr);
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if (!ctx->args->shader_info->gs.num_stream_output_components[stream])
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if (stream > 0 && !ctx->args->shader_info->gs.num_stream_output_components[stream])
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return;
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ctx->ngg_gs_known_vtxcnt[stream] = true;
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@@ -7048,7 +7048,6 @@ void visit_emit_vertex_with_counter(isel_context *ctx, nir_intrinsic_instr *inst
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unsigned num_components =
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ctx->program->info->gs.num_stream_output_components[stream];
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assert(num_components);
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unsigned stride = 4u * num_components * ctx->shader->info.gs.vertices_out;
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unsigned stream_offset = 0;
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@@ -479,6 +479,13 @@ void PipelineBuilder::add_stage(VkShaderStageFlagBits stage, VkShaderModule modu
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owned_stages |= stage;
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}
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void PipelineBuilder::add_stage(VkShaderStageFlagBits stage, QoShaderModuleCreateInfo module, const char *name)
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{
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add_stage(stage, __qoCreateShaderModule(device, &module), name);
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add_resource_decls(&module);
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add_io_decls(&module);
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}
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void PipelineBuilder::add_vsfs(VkShaderModule vs, VkShaderModule fs)
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{
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add_stage(VK_SHADER_STAGE_VERTEX_BIT, vs);
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@@ -487,11 +494,8 @@ void PipelineBuilder::add_vsfs(VkShaderModule vs, VkShaderModule fs)
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void PipelineBuilder::add_vsfs(QoShaderModuleCreateInfo vs, QoShaderModuleCreateInfo fs)
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{
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add_vsfs(__qoCreateShaderModule(device, &vs), __qoCreateShaderModule(device, &fs));
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add_resource_decls(&vs);
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add_io_decls(&vs);
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add_resource_decls(&fs);
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add_io_decls(&fs);
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add_stage(VK_SHADER_STAGE_VERTEX_BIT, vs);
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add_stage(VK_SHADER_STAGE_FRAGMENT_BIT, fs);
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}
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void PipelineBuilder::add_cs(VkShaderModule cs)
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@@ -501,8 +505,7 @@ void PipelineBuilder::add_cs(VkShaderModule cs)
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void PipelineBuilder::add_cs(QoShaderModuleCreateInfo cs)
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{
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add_cs(__qoCreateShaderModule(device, &cs));
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add_resource_decls(&cs);
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add_stage(VK_SHADER_STAGE_COMPUTE_BIT, cs);
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}
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bool PipelineBuilder::is_compute() {
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@@ -135,6 +135,7 @@ public:
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void add_io_decls(QoShaderModuleCreateInfo *module);
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void add_stage(VkShaderStageFlagBits stage, VkShaderModule module, const char *name="main");
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void add_stage(VkShaderStageFlagBits stage, QoShaderModuleCreateInfo module, const char *name="main");
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void add_vsfs(VkShaderModule vs, VkShaderModule fs);
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void add_vsfs(QoShaderModuleCreateInfo vs, QoShaderModuleCreateInfo fs);
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void add_cs(VkShaderModule cs);
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@@ -78,3 +78,32 @@ BEGIN_TEST(isel.compute.simple)
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pbld.print_ir(VK_SHADER_STAGE_COMPUTE_BIT, "ACO IR", true);
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}
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END_TEST
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BEGIN_TEST(isel.gs.no_outputs)
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for (unsigned i = GFX8; i <= GFX10; i++) {
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if (!set_variant((chip_class)i))
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continue;
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QoShaderModuleCreateInfo vs = qoShaderModuleCreateInfoGLSL(VERTEX,
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void main() {}
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);
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QoShaderModuleCreateInfo gs = qoShaderModuleCreateInfoGLSL(GEOMETRY,
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layout(points) in;
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layout(points, max_vertices = 1) out;
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void main() {
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EmitVertex();
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EndPrimitive();
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}
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);
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PipelineBuilder pbld(get_vk_device((chip_class)i));
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pbld.add_stage(VK_SHADER_STAGE_VERTEX_BIT, vs);
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pbld.add_stage(VK_SHADER_STAGE_GEOMETRY_BIT, gs);
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pbld.create_pipeline();
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//! success
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fprintf(output, "success\n");
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}
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END_TEST
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