radv/sqtt: fix GPU hangs when capturing from the compute queue
S_008D20_FINISH_DONE is a mask of queues and 1 means "wait on the gfx queue until the value is not 0" which can never happen when the driver captures from compute. Instead, use the full mask of possible queues. Cc: 21.3 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13694>
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@@ -389,15 +389,6 @@ radv_handle_thread_trace(VkQueue _queue)
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#endif
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if (frame_trigger || file_trigger || resize_trigger) {
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/* FIXME: SQTT on compute hangs. */
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if (queue->vk.queue_family_index == RADV_QUEUE_COMPUTE) {
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fprintf(stderr, "RADV: Capturing a SQTT trace on the compute "
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"queue is currently broken and might hang! "
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"Please, disable presenting on compute if "
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"you can.\n");
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return;
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}
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radv_begin_thread_trace(queue);
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assert(!thread_trace_enabled);
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thread_trace_enabled = true;
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@@ -269,7 +269,7 @@ radv_emit_thread_trace_stop(struct radv_device *device, struct radeon_cmdbuf *cs
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radeon_emit(cs, R_008D20_SQ_THREAD_TRACE_STATUS >> 2); /* register */
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radeon_emit(cs, 0);
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radeon_emit(cs, 0); /* reference value */
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radeon_emit(cs, S_008D20_FINISH_DONE(1)); /* mask */
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radeon_emit(cs, ~C_008D20_FINISH_DONE);
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radeon_emit(cs, 4); /* poll interval */
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/* Disable the thread trace mode. */
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@@ -283,7 +283,7 @@ radv_emit_thread_trace_stop(struct radv_device *device, struct radeon_cmdbuf *cs
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radeon_emit(cs, R_008D20_SQ_THREAD_TRACE_STATUS >> 2); /* register */
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radeon_emit(cs, 0);
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radeon_emit(cs, 0); /* reference value */
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radeon_emit(cs, S_008D20_BUSY(1)); /* mask */
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radeon_emit(cs, ~C_008D20_BUSY); /* mask */
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radeon_emit(cs, 4); /* poll interval */
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} else {
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/* Disable the thread trace mode. */
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@@ -296,7 +296,7 @@ radv_emit_thread_trace_stop(struct radv_device *device, struct radeon_cmdbuf *cs
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radeon_emit(cs, R_030CE8_SQ_THREAD_TRACE_STATUS >> 2); /* register */
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radeon_emit(cs, 0);
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radeon_emit(cs, 0); /* reference value */
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radeon_emit(cs, S_030CE8_BUSY(1)); /* mask */
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radeon_emit(cs, ~C_030CE8_BUSY); /* mask */
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radeon_emit(cs, 4); /* poll interval */
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}
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