iris: Skip framebuffer resolve tracking if framebuffer isn't dirty
Improves drawoverhead baseline score by 1.86x.
This commit is contained in:
@@ -147,9 +147,9 @@ iris_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
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ice->vtbl.update_surface_base_address(batch, &ice->state.binder);
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ice->vtbl.upload_render_state(ice, batch, info);
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ice->state.dirty &= ~IRIS_ALL_DIRTY_FOR_RENDER;
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iris_postdraw_update_resolve_tracking(ice, batch);
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ice->state.dirty &= ~IRIS_ALL_DIRTY_FOR_RENDER;
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}
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static void
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@@ -174,50 +174,57 @@ iris_predraw_resolve_framebuffer(struct iris_context *ice,
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bool *draw_aux_buffer_disabled)
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{
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struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
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struct pipe_surface *zs_surf = cso_fb->zsbuf;
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if (zs_surf) {
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struct iris_resource *z_res, *s_res;
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iris_get_depth_stencil_resources(zs_surf->texture, &z_res, &s_res);
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unsigned num_layers =
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zs_surf->u.tex.last_layer - zs_surf->u.tex.first_layer + 1;
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if (ice->state.dirty & IRIS_DIRTY_DEPTH_BUFFER) {
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struct pipe_surface *zs_surf = cso_fb->zsbuf;
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if (z_res) {
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iris_resource_prepare_depth(ice, batch, z_res, zs_surf->u.tex.level,
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zs_surf->u.tex.first_layer, num_layers);
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iris_cache_flush_for_depth(batch, z_res->bo);
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}
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if (zs_surf) {
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struct iris_resource *z_res, *s_res;
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iris_get_depth_stencil_resources(zs_surf->texture, &z_res, &s_res);
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unsigned num_layers =
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zs_surf->u.tex.last_layer - zs_surf->u.tex.first_layer + 1;
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if (s_res) {
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iris_cache_flush_for_depth(batch, s_res->bo);
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if (z_res) {
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iris_resource_prepare_depth(ice, batch, z_res,
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zs_surf->u.tex.level,
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zs_surf->u.tex.first_layer,
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num_layers);
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iris_cache_flush_for_depth(batch, z_res->bo);
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}
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if (s_res) {
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iris_cache_flush_for_depth(batch, s_res->bo);
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}
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}
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}
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for (unsigned i = 0; i < cso_fb->nr_cbufs; i++) {
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struct iris_surface *surf = (void *) cso_fb->cbufs[i];
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if (!surf)
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continue;
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if (ice->state.dirty & (IRIS_DIRTY_BINDINGS_FS | IRIS_DIRTY_BLEND_STATE)) {
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for (unsigned i = 0; i < cso_fb->nr_cbufs; i++) {
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struct iris_surface *surf = (void *) cso_fb->cbufs[i];
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if (!surf)
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continue;
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struct iris_resource *res = (void *) surf->base.texture;
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struct iris_resource *res = (void *) surf->base.texture;
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enum isl_aux_usage aux_usage =
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iris_resource_render_aux_usage(ice, res, surf->view.format,
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ice->state.blend_enables & (1u << i),
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draw_aux_buffer_disabled[i]);
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enum isl_aux_usage aux_usage =
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iris_resource_render_aux_usage(ice, res, surf->view.format,
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ice->state.blend_enables & (1u << i),
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draw_aux_buffer_disabled[i]);
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if (ice->state.draw_aux_usage[i] != aux_usage) {
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ice->state.draw_aux_usage[i] = aux_usage;
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/* XXX: Need to track which bindings to make dirty */
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ice->state.dirty |= IRIS_ALL_DIRTY_BINDINGS;
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if (ice->state.draw_aux_usage[i] != aux_usage) {
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ice->state.draw_aux_usage[i] = aux_usage;
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/* XXX: Need to track which bindings to make dirty */
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ice->state.dirty |= IRIS_ALL_DIRTY_BINDINGS;
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}
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iris_resource_prepare_render(ice, batch, res, surf->view.base_level,
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surf->view.base_array_layer,
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surf->view.array_len,
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aux_usage);
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iris_cache_flush_for_render(batch, res->bo, surf->view.format,
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aux_usage);
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}
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iris_resource_prepare_render(ice, batch, res, surf->view.base_level,
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surf->view.base_array_layer,
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surf->view.array_len,
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aux_usage);
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iris_cache_flush_for_render(batch, res->bo, surf->view.format,
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aux_usage);
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}
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}
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@@ -238,50 +245,57 @@ iris_postdraw_update_resolve_tracking(struct iris_context *ice,
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struct iris_batch *batch)
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{
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struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
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struct pipe_surface *zs_surf = cso_fb->zsbuf;
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// XXX: front buffer drawing?
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if (zs_surf) {
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struct iris_resource *z_res, *s_res;
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iris_get_depth_stencil_resources(zs_surf->texture, &z_res, &s_res);
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unsigned num_layers =
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zs_surf->u.tex.last_layer - zs_surf->u.tex.first_layer + 1;
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if (ice->state.dirty & (IRIS_DIRTY_DEPTH_BUFFER |
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IRIS_DIRTY_WM_DEPTH_STENCIL)) {
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struct pipe_surface *zs_surf = cso_fb->zsbuf;
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if (zs_surf) {
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struct iris_resource *z_res, *s_res;
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iris_get_depth_stencil_resources(zs_surf->texture, &z_res, &s_res);
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unsigned num_layers =
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zs_surf->u.tex.last_layer - zs_surf->u.tex.first_layer + 1;
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if (z_res) {
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iris_resource_finish_depth(ice, z_res, zs_surf->u.tex.level,
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zs_surf->u.tex.first_layer, num_layers,
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ice->state.depth_writes_enabled);
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if (z_res) {
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iris_resource_finish_depth(ice, z_res, zs_surf->u.tex.level,
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zs_surf->u.tex.first_layer, num_layers,
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ice->state.depth_writes_enabled);
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if (ice->state.depth_writes_enabled)
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iris_depth_cache_add_bo(batch, z_res->bo);
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}
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if (ice->state.depth_writes_enabled)
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iris_depth_cache_add_bo(batch, z_res->bo);
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}
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if (s_res) {
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iris_resource_finish_write(ice, s_res, zs_surf->u.tex.level,
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zs_surf->u.tex.first_layer, num_layers,
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ISL_AUX_USAGE_NONE);
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if (s_res) {
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iris_resource_finish_write(ice, s_res, zs_surf->u.tex.level,
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zs_surf->u.tex.first_layer, num_layers,
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ISL_AUX_USAGE_NONE);
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if (ice->state.stencil_writes_enabled)
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iris_depth_cache_add_bo(batch, s_res->bo);
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if (ice->state.stencil_writes_enabled)
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iris_depth_cache_add_bo(batch, s_res->bo);
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}
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}
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}
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for (unsigned i = 0; i < cso_fb->nr_cbufs; i++) {
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struct iris_surface *surf = (void *) cso_fb->cbufs[i];
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if (!surf)
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continue;
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if (ice->state.dirty & (IRIS_DIRTY_BINDINGS_FS | IRIS_DIRTY_BLEND_STATE)) {
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for (unsigned i = 0; i < cso_fb->nr_cbufs; i++) {
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struct iris_surface *surf = (void *) cso_fb->cbufs[i];
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if (!surf)
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continue;
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struct iris_resource *res = (void *) surf->base.texture;
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union pipe_surface_desc *desc = &surf->base.u;
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unsigned num_layers = desc->tex.last_layer - desc->tex.first_layer + 1;
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enum isl_aux_usage aux_usage = ice->state.draw_aux_usage[i];
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struct iris_resource *res = (void *) surf->base.texture;
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union pipe_surface_desc *desc = &surf->base.u;
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unsigned num_layers =
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desc->tex.last_layer - desc->tex.first_layer + 1;
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enum isl_aux_usage aux_usage = ice->state.draw_aux_usage[i];
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iris_render_cache_add_bo(batch, res->bo, surf->view.format, aux_usage);
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iris_resource_finish_render(ice, res, desc->tex.level,
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desc->tex.first_layer, num_layers,
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iris_render_cache_add_bo(batch, res->bo, surf->view.format,
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aux_usage);
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iris_resource_finish_render(ice, res, desc->tex.level,
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desc->tex.first_layer, num_layers,
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aux_usage);
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}
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}
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}
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