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i965: Fix off by one errors in texture buffer size calculations.

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The value that's split into width/height/depth needs to be the size of
the buffer minus one.  This makes it consistent with the constant buffer
and shader time SURFACE_STATE setup code.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Kenneth Graunke
2013-09-17 11:23:59 -07:00
parent 34b11334d4
commit 35a54ad02f
2 changed files with 2 additions and 2 deletions
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src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+1 -1
View File
@@ -228,7 +228,7 @@ brw_update_buffer_texture_surface(struct gl_context *ctx,
*surf_offset + 4,
bo, 0, I915_GEM_DOMAIN_SAMPLER, 0);
int w = intel_obj->Base.Size / texel_size;
int w = (intel_obj->Base.Size / texel_size) - 1;
surf[2] = ((w & 0x7f) << BRW_SURFACE_WIDTH_SHIFT |
((w >> 7) & 0x1fff) << BRW_SURFACE_HEIGHT_SHIFT);
surf[3] = (((w >> 20) & 0x7f) << BRW_SURFACE_DEPTH_SHIFT |
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+1 -1
View File
@@ -260,7 +260,7 @@ gen7_update_buffer_texture_surface(struct gl_context *ctx,
I915_GEM_DOMAIN_SAMPLER, 0);
int texel_size = _mesa_get_format_bytes(format);
int w = intel_obj->Base.Size / texel_size;
int w = (intel_obj->Base.Size / texel_size) - 1;
/* note that these differ from GEN6 */
surf[2] = SET_FIELD(w & 0x7f, GEN7_SURFACE_WIDTH) | /* bits 6:0 of size */