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winsys/radeon: remove definitions already present in radeon_drm.h

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Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
This commit is contained in:
Marek Olšák
2014-04-04 20:18:37 +02:00
parent e3e05c6db9
commit 34564c8753
4 changed files with 5 additions and 205 deletions
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src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+5 -70
View File
@@ -43,73 +43,8 @@
#include <fcntl.h>
#include <stdio.h>
/*
* this are copy from radeon_drm, once an updated libdrm is released
* we should bump configure.ac requirement for it and remove the following
* field
*/
#define RADEON_BO_FLAGS_MACRO_TILE 1
#define RADEON_BO_FLAGS_MICRO_TILE 2
#define RADEON_BO_FLAGS_MICRO_TILE_SQUARE 0x20
#ifndef DRM_RADEON_GEM_WAIT
#define DRM_RADEON_GEM_WAIT 0x2b
#define RADEON_GEM_NO_WAIT 0x1
#define RADEON_GEM_USAGE_READ 0x2
#define RADEON_GEM_USAGE_WRITE 0x4
struct drm_radeon_gem_wait {
uint32_t handle;
uint32_t flags; /* one of RADEON_GEM_* */
};
#endif
#ifndef RADEON_VA_MAP
#define RADEON_VA_MAP 1
#define RADEON_VA_UNMAP 2
#define RADEON_VA_RESULT_OK 0
#define RADEON_VA_RESULT_ERROR 1
#define RADEON_VA_RESULT_VA_EXIST 2
#define RADEON_VM_PAGE_VALID (1 << 0)
#define RADEON_VM_PAGE_READABLE (1 << 1)
#define RADEON_VM_PAGE_WRITEABLE (1 << 2)
#define RADEON_VM_PAGE_SYSTEM (1 << 3)
#define RADEON_VM_PAGE_SNOOPED (1 << 4)
struct drm_radeon_gem_va {
uint32_t handle;
uint32_t operation;
uint32_t vm_id;
uint32_t flags;
uint64_t offset;
};
#define DRM_RADEON_GEM_VA 0x2b
#endif
#ifndef DRM_RADEON_GEM_OP
#define DRM_RADEON_GEM_OP 0x2c
/* Sets or returns a value associated with a buffer. */
struct drm_radeon_gem_op {
uint32_t handle; /* buffer */
uint32_t op; /* RADEON_GEM_OP_* */
uint64_t value; /* input or return value */
};
#define RADEON_GEM_OP_GET_INITIAL_DOMAIN 0
#define RADEON_GEM_OP_SET_INITIAL_DOMAIN 1
#endif
extern const struct pb_vtbl radeon_bo_vtbl;
static INLINE struct radeon_bo *radeon_bo(struct pb_buffer *bo)
{
assert(bo->vtbl == &radeon_bo_vtbl);
@@ -777,12 +712,12 @@ static void radeon_bo_get_tiling(struct pb_buffer *_buf,
*microtiled = RADEON_LAYOUT_LINEAR;
*macrotiled = RADEON_LAYOUT_LINEAR;
if (args.tiling_flags & RADEON_BO_FLAGS_MICRO_TILE)
if (args.tiling_flags & RADEON_TILING_MICRO)
*microtiled = RADEON_LAYOUT_TILED;
else if (args.tiling_flags & RADEON_TILING_MICRO_SQUARE)
*microtiled = RADEON_LAYOUT_SQUARETILED;
if (args.tiling_flags & RADEON_BO_FLAGS_MACRO_TILE)
if (args.tiling_flags & RADEON_TILING_MACRO)
*macrotiled = RADEON_LAYOUT_TILED;
if (bankw && tile_split && stencil_tile_split && mtilea && tile_split) {
*bankw = (args.tiling_flags >> RADEON_TILING_EG_BANKW_SHIFT) & RADEON_TILING_EG_BANKW_MASK;
@@ -824,12 +759,12 @@ static void radeon_bo_set_tiling(struct pb_buffer *_buf,
}
if (microtiled == RADEON_LAYOUT_TILED)
args.tiling_flags |= RADEON_BO_FLAGS_MICRO_TILE;
args.tiling_flags |= RADEON_TILING_MICRO;
else if (microtiled == RADEON_LAYOUT_SQUARETILED)
args.tiling_flags |= RADEON_BO_FLAGS_MICRO_TILE_SQUARE;
args.tiling_flags |= RADEON_TILING_MICRO_SQUARE;
if (macrotiled == RADEON_LAYOUT_TILED)
args.tiling_flags |= RADEON_BO_FLAGS_MACRO_TILE;
args.tiling_flags |= RADEON_TILING_MACRO;
args.tiling_flags |= (bankw & RADEON_TILING_EG_BANKW_MASK) <<
RADEON_TILING_EG_BANKW_SHIFT;
src/gallium/winsys/radeon/drm/radeon_drm_cs.c
-35
View File
@@ -72,41 +72,6 @@
#include <stdint.h>
#include <xf86drm.h>
/*
* this are copy from radeon_drm, once an updated libdrm is released
* we should bump configure.ac requirement for it and remove the following
* field
*/
#ifndef RADEON_CHUNK_ID_FLAGS
#define RADEON_CHUNK_ID_FLAGS 0x03
/* The first dword of RADEON_CHUNK_ID_FLAGS is a uint32 of these flags: */
#define RADEON_CS_KEEP_TILING_FLAGS 0x01
#endif
#ifndef RADEON_CS_USE_VM
#define RADEON_CS_USE_VM 0x02
/* The second dword of RADEON_CHUNK_ID_FLAGS is a uint32 that sets the ring type */
#define RADEON_CS_RING_GFX 0
#define RADEON_CS_RING_COMPUTE 1
#endif
#ifndef RADEON_CS_RING_DMA
#define RADEON_CS_RING_DMA 2
#endif
#ifndef RADEON_CS_RING_UVD
#define RADEON_CS_RING_UVD 3
#endif
#ifndef RADEON_CS_RING_VCE
#define RADEON_CS_RING_VCE 4
#endif
#ifndef RADEON_CS_END_OF_FRAME
#define RADEON_CS_END_OF_FRAME 0x04
#endif
#define RELOC_DWORDS (sizeof(struct drm_radeon_cs_reloc) / sizeof(uint32_t))
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
-70
View File
@@ -45,76 +45,6 @@
#include <sys/stat.h>
#include <unistd.h>
/*
* this are copy from radeon_drm, once an updated libdrm is released
* we should bump configure.ac requirement for it and remove the following
* field
*/
#ifndef RADEON_INFO_TILING_CONFIG
#define RADEON_INFO_TILING_CONFIG 6
#endif
#ifndef RADEON_INFO_WANT_HYPERZ
#define RADEON_INFO_WANT_HYPERZ 7
#endif
#ifndef RADEON_INFO_WANT_CMASK
#define RADEON_INFO_WANT_CMASK 8
#endif
#ifndef RADEON_INFO_CLOCK_CRYSTAL_FREQ
#define RADEON_INFO_CLOCK_CRYSTAL_FREQ 9
#endif
#ifndef RADEON_INFO_NUM_BACKENDS
#define RADEON_INFO_NUM_BACKENDS 0xa
#endif
#ifndef RADEON_INFO_NUM_TILE_PIPES
#define RADEON_INFO_NUM_TILE_PIPES 0xb
#endif
#ifndef RADEON_INFO_BACKEND_MAP
#define RADEON_INFO_BACKEND_MAP 0xd
#endif
#ifndef RADEON_INFO_VA_START
/* virtual address start, va < start are reserved by the kernel */
#define RADEON_INFO_VA_START 0x0e
/* maximum size of ib using the virtual memory cs */
#define RADEON_INFO_IB_VM_MAX_SIZE 0x0f
#endif
#ifndef RADEON_INFO_MAX_PIPES
#define RADEON_INFO_MAX_PIPES 0x10
#endif
#ifndef RADEON_INFO_TIMESTAMP
#define RADEON_INFO_TIMESTAMP 0x11
#endif
#ifndef RADEON_INFO_RING_WORKING
#define RADEON_INFO_RING_WORKING 0x15
#endif
#ifndef RADEON_INFO_VCE_FW_VERSION
#define RADEON_INFO_VCE_FW_VERSION 0x1b
#endif
#ifndef RADEON_INFO_NUM_BYTES_MOVED
#define RADEON_INFO_NUM_BYTES_MOVED 0x1d
#define RADEON_INFO_VRAM_USAGE 0x1e
#define RADEON_INFO_GTT_USAGE 0x1f
#endif
#ifndef RADEON_CS_RING_UVD
#define RADEON_CS_RING_UVD 3
#endif
#ifndef RADEON_CS_RING_VCE
#define RADEON_CS_RING_VCE 4
#endif
static struct util_hash_table *fd_tab = NULL;
/* Enable/disable feature access for one command stream.
src/gallium/winsys/radeon/tools/radeon_ctx.h
-30
View File
@@ -37,36 +37,6 @@
#include "xf86drm.h"
#include "radeon_drm.h"
#ifndef RADEON_CHUNK_ID_FLAGS
#define RADEON_CHUNK_ID_FLAGS 0x03
/* The first dword of RADEON_CHUNK_ID_FLAGS is a uint32 of these flags: */
#define RADEON_CS_KEEP_TILING_FLAGS 0x01
#endif
#ifndef RADEON_VA_MAP
#define RADEON_VA_MAP 1
#define RADEON_VA_UNMAP 2
#define RADEON_VA_RESULT_OK 0
#define RADEON_VA_RESULT_ERROR 1
#define RADEON_VA_RESULT_VA_EXIST 2
#define RADEON_VM_PAGE_VALID (1 << 0)
#define RADEON_VM_PAGE_READABLE (1 << 1)
#define RADEON_VM_PAGE_WRITEABLE (1 << 2)
#define RADEON_VM_PAGE_SYSTEM (1 << 3)
#define RADEON_VM_PAGE_SNOOPED (1 << 4)
struct drm_radeon_gem_va {
uint32_t handle;
uint32_t operation;
uint32_t vm_id;
uint32_t flags;
uint64_t offset;
};
#define DRM_RADEON_GEM_VA 0x2b
#endif
struct ctx {
int fd;
};