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radv/amdgpu: allow to execute external IBs on the compute queue

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IB2 isn't supported on ACE, so external IBs should be submitted as IB1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24207>
This commit is contained in:
Samuel Pitoiset
2023-06-26 09:46:57 +02:00
committed by Marge Bot
parent e3fae01730
commit 33f584f033
1 changed files with 1 additions and 3 deletions
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src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
+1 -3
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@@ -746,9 +746,7 @@ radv_amdgpu_cs_execute_ib(struct radeon_cmdbuf *_cs, struct radeon_winsys_bo *bo
if (cs->status != VK_SUCCESS)
return;
assert(cs->hw_ip == AMD_IP_GFX);
if (cs->use_ib) {
if (cs->hw_ip == AMD_IP_GFX && cs->use_ib) {
radeon_emit(&cs->base, PKT3(PKT3_INDIRECT_BUFFER, 2, 0));
radeon_emit(&cs->base, va);
radeon_emit(&cs->base, va >> 32);