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radv: fix reserving space for emitting push constants with DGC IES

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layout->push_constant_mask is only the DGC push constant mask (ie. the
tokens that are specified), but with IES all push constants are emitted
from the DGC shader. So it should be the total range of push constant.

This used to work by luck due to the preprocess buffer alignment.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753>
This commit is contained in:
Samuel Pitoiset
2025-08-13 08:32:03 +02:00
committed by Marge Bot
parent 23c49ede57
commit 3359386145
1 changed files with 1 additions and 1 deletions
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src/amd/vulkan/radv_dgc.c
+1 -1
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@@ -393,7 +393,7 @@ radv_get_sequence_size(const struct radv_indirect_command_layout *layout, const
*cmd_size += 3 * 4;
need_copy = true;
*cmd_size += (3 * util_bitcount64(layout->push_constant_mask)) * 4;
*cmd_size += (3 * (pipeline_layout->push_constant_size / 4)) * 4;
} else {
struct radv_shader *shaders[MESA_VULKAN_SHADER_STAGES] = {0};
if (pipeline_info) {