intel/brw: Add builder helpers for math functions

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28957>
This commit is contained in:
Kenneth Graunke
2024-04-12 17:57:33 -07:00
committed by Marge Bot
parent cf8ed9925f
commit 319ba85e10
2 changed files with 42 additions and 23 deletions

View File

@@ -545,22 +545,26 @@ namespace brw {
* Assorted arithmetic ops.
* @{
*/
#define ALU1(op) \
fs_inst * \
op(const fs_reg &dst, const fs_reg &src0) const \
{ \
assert(_dispatch_width == 1 || \
(dst.file >= VGRF && dst.stride != 0) || \
(dst.file < VGRF && dst.hstride != 0)); \
return emit(BRW_OPCODE_##op, dst, src0); \
#define _ALU1(prefix, op) \
fs_inst * \
op(const fs_reg &dst, const fs_reg &src0) const \
{ \
assert(_dispatch_width == 1 || \
(dst.file >= VGRF && dst.stride != 0) || \
(dst.file < VGRF && dst.hstride != 0)); \
return emit(prefix##op, dst, src0); \
}
#define ALU1(op) _ALU1(BRW_OPCODE_, op)
#define VIRT1(op) _ALU1(SHADER_OPCODE_, op)
#define ALU2(op) \
fs_inst * \
#define _ALU2(prefix, op) \
fs_inst * \
op(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1) const \
{ \
return emit(BRW_OPCODE_##op, dst, src0, src1); \
{ \
return emit(prefix##op, dst, src0, src1); \
}
#define ALU2(op) _ALU2(BRW_OPCODE_, op)
#define VIRT2(op) _ALU2(SHADER_OPCODE_, op)
#define ALU2_ACC(op) \
fs_inst * \
@@ -622,10 +626,25 @@ namespace brw {
ALU2_ACC(SUBB)
ALU2(XOR)
VIRT1(RCP)
VIRT1(RSQ)
VIRT1(SQRT)
VIRT1(EXP2)
VIRT1(LOG2)
VIRT2(POW)
VIRT2(INT_QUOTIENT)
VIRT2(INT_REMAINDER)
VIRT1(SIN)
VIRT1(COS)
#undef ALU3
#undef ALU2_ACC
#undef ALU2
#undef VIRT2
#undef _ALU2
#undef ALU1
#undef VIRT1
#undef _ALU1
/** @} */
/**

View File

@@ -1230,23 +1230,23 @@ fs_nir_emit_alu(nir_to_brw_state &ntb, nir_alu_instr *instr,
break;
case nir_op_frcp:
bld.emit(SHADER_OPCODE_RCP, result, op[0]);
bld.RCP(result, op[0]);
break;
case nir_op_fexp2:
bld.emit(SHADER_OPCODE_EXP2, result, op[0]);
bld.EXP2(result, op[0]);
break;
case nir_op_flog2:
bld.emit(SHADER_OPCODE_LOG2, result, op[0]);
bld.LOG2(result, op[0]);
break;
case nir_op_fsin:
bld.emit(SHADER_OPCODE_SIN, result, op[0]);
bld.SIN(result, op[0]);
break;
case nir_op_fcos:
bld.emit(SHADER_OPCODE_COS, result, op[0]);
bld.COS(result, op[0]);
break;
case nir_op_fddx_fine:
@@ -1382,7 +1382,7 @@ fs_nir_emit_alu(nir_to_brw_state &ntb, nir_alu_instr *instr,
case nir_op_idiv:
case nir_op_udiv:
assert(instr->def.bit_size < 64);
bld.emit(SHADER_OPCODE_INT_QUOTIENT, result, op[0], op[1]);
bld.INT_QUOTIENT(result, op[0], op[1]);
break;
case nir_op_uadd_carry:
@@ -1398,12 +1398,12 @@ fs_nir_emit_alu(nir_to_brw_state &ntb, nir_alu_instr *instr,
* remainder.
*/
assert(instr->def.bit_size < 64);
bld.emit(SHADER_OPCODE_INT_REMAINDER, result, op[0], op[1]);
bld.INT_REMAINDER(result, op[0], op[1]);
break;
case nir_op_imod: {
/* Get a regular C-style remainder. If a % b == 0, set the predicate. */
bld.emit(SHADER_OPCODE_INT_REMAINDER, result, op[0], op[1]);
bld.INT_REMAINDER(result, op[0], op[1]);
/* Math instructions don't support conditional mod */
inst = bld.MOV(bld.null_reg_d(), result);
@@ -1585,11 +1585,11 @@ fs_nir_emit_alu(nir_to_brw_state &ntb, nir_alu_instr *instr,
unreachable("not reached: should be handled by ldexp_to_arith()");
case nir_op_fsqrt:
bld.emit(SHADER_OPCODE_SQRT, result, op[0]);
bld.SQRT(result, op[0]);
break;
case nir_op_frsq:
bld.emit(SHADER_OPCODE_RSQ, result, op[0]);
bld.RSQ(result, op[0]);
break;
case nir_op_ftrunc:
@@ -1706,7 +1706,7 @@ fs_nir_emit_alu(nir_to_brw_state &ntb, nir_alu_instr *instr,
}
case nir_op_fpow:
bld.emit(SHADER_OPCODE_POW, result, op[0], op[1]);
bld.POW(result, op[0], op[1]);
break;
case nir_op_bitfield_reverse: