i965/fs: Implement texelFetch() on Ironlake and Sandybridge.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

src/mesa/drivers/dri/i965/brw_defines.h

@@ -633,6 +633,7 @@ enum opcode {
    FS_OPCODE_TEX,
    FS_OPCODE_TXB,
    FS_OPCODE_TXD,
+   FS_OPCODE_TXF,
    FS_OPCODE_TXL,
    FS_OPCODE_TXS,
    FS_OPCODE_DISCARD,
@@ -782,6 +783,7 @@ enum opcode {
 #define GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS       4
 #define GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE 5
 #define GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE  6
+#define GEN5_SAMPLER_MESSAGE_SAMPLE_LD           7
 #define GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO      10
 
 /* for GEN5 only */

src/mesa/drivers/dri/i965/brw_fs.cpp

@@ -156,6 +156,7 @@ fs_visitor::implied_mrf_writes(fs_inst *inst)
    case FS_OPCODE_TEX:
    case FS_OPCODE_TXB:
    case FS_OPCODE_TXD:
+   case FS_OPCODE_TXF:
    case FS_OPCODE_TXL:
    case FS_OPCODE_TXS:
       return 1;

src/mesa/drivers/dri/i965/brw_fs.h

@@ -291,6 +291,7 @@ public:
       return (opcode == FS_OPCODE_TEX ||
 	      opcode == FS_OPCODE_TXB ||
 	      opcode == FS_OPCODE_TXD ||
+	      opcode == FS_OPCODE_TXF ||
 	      opcode == FS_OPCODE_TXL ||
 	      opcode == FS_OPCODE_TXS);
    }

src/mesa/drivers/dri/i965/brw_fs_emit.cpp

@@ -249,6 +249,9 @@ fs_visitor::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src)
 	 /* There is no sample_d_c message; comparisons are done manually */
 	 msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS;
 	 break;
+      case FS_OPCODE_TXF:
+	 msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_LD;
+	 break;
       default:
 	 assert(!"not reached");
 	 break;
@@ -782,6 +785,7 @@ fs_visitor::generate_code()
       case FS_OPCODE_TEX:
       case FS_OPCODE_TXB:
       case FS_OPCODE_TXD:
+      case FS_OPCODE_TXF:
       case FS_OPCODE_TXL:
       case FS_OPCODE_TXS:
 	 generate_tex(inst, dst, src[0]);

src/mesa/drivers/dri/i965/brw_fs_visitor.cpp

@@ -785,7 +785,8 @@ fs_visitor::emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 
    for (int i = 0; i < vector_elements; i++) {
       fs_inst *inst = emit(BRW_OPCODE_MOV,
-			   fs_reg(MRF, base_mrf + mlen + i * reg_width),
+			   fs_reg(MRF, base_mrf + mlen + i * reg_width,
+				  coordinate.type),
 			   coordinate);
       if (i < 3 && c->key.gl_clamp_mask[i] & (1 << sampler))
 	 inst->saturate = true;
@@ -861,7 +862,13 @@ fs_visitor::emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
       inst = emit(FS_OPCODE_TXS, dst);
       break;
    case ir_txf:
-      assert(!"GLSL 1.30 features unsupported");
+      mlen = header_present + 4 * reg_width;
+
+      ir->lod_info.lod->accept(this);
+      emit(BRW_OPCODE_MOV,
+	   fs_reg(MRF, base_mrf + mlen - reg_width, BRW_REGISTER_TYPE_UD),
+	   this->result);
+      inst = emit(FS_OPCODE_TXF, dst);
       break;
    }
    inst->base_mrf = base_mrf;

src/mesa/program/ir_to_mesa.cpp

@@ -2139,6 +2139,8 @@ ir_to_mesa_visitor::visit(ir_texture *ir)
       ir->lod_info.bias->accept(this);
       lod_info = this->result;
       break;
+   case ir_txf:
+      /* Pretend to be TXL so the sampler, coordinate, lod are available */
    case ir_txl:
       opcode = OPCODE_TXL;
       ir->lod_info.lod->accept(this);
@@ -2151,9 +2153,6 @@ ir_to_mesa_visitor::visit(ir_texture *ir)
       ir->lod_info.grad.dPdy->accept(this);
       dy = this->result;
       break;
-   case ir_txf:
-      assert(!"GLSL 1.30 features unsupported");
-      break;
    }
 
    const glsl_type *sampler_type = ir->sampler->type;