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freedreno/registers: Fix a few field names

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Give proper names to a few bitfields that we were already using.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
This commit is contained in:
Rob Clark
2025-10-20 10:48:24 -07:00
committed by Marge Bot
parent ccdd5eb49d
commit 30a0ac7c0f
10 changed files with 34 additions and 34 deletions
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src/freedreno/registers/adreno/a6xx.xml
+4 -4
View File
@@ -2202,7 +2202,7 @@ by a particular renderpass/blit.
<bitfield name="IJ_LINEAR_CENTROID" pos="4" type="boolean"/>
<bitfield name="IJ_LINEAR_SAMPLE" pos="5" type="boolean"/>
<bitfield name="COORD_MASK" low="6" high="9" type="hex"/>
<bitfield name="UNK10" pos="10" type="boolean"/>
<bitfield name="INTERP_EN" pos="10" type="boolean"/>
</reg32>
<reg32 offset="0x880a" name="RB_PS_INPUT_CNTL" usage="rp_blit">
<!-- enable bits for various FS sysvalue regs: -->
@@ -2299,8 +2299,8 @@ by a particular renderpass/blit.
<!-- 0x881f invalid -->
<array offset="0x8820" name="RB_MRT" stride="8" length="8" usage="rp_blit">
<reg32 offset="0x0" name="CONTROL">
<bitfield name="BLEND" pos="0" type="boolean"/>
<bitfield name="BLEND2" pos="1" type="boolean"/>
<bitfield name="COLOR_BLEND_EN" pos="0" type="boolean"/>
<bitfield name="ALPHA_BLEND_EN" pos="1" type="boolean"/>
<bitfield name="ROP_ENABLE" pos="2" type="boolean"/>
<bitfield name="ROP_CODE" low="3" high="6" type="a3xx_rop_code"/>
<bitfield name="COMPONENT_ENABLE" low="7" high="10" type="hex"/>
@@ -3827,7 +3827,7 @@ by a particular renderpass/blit.
<reg32 offset="0xa989" name="SP_BLEND_CNTL" usage="rp_blit">
<!-- per-mrt enable bit -->
<bitfield name="ENABLE_BLEND" low="0" high="7"/>
<bitfield name="UNK8" pos="8" type="boolean"/>
<bitfield name="INDEPENDENT_BLEND_EN" pos="8" type="boolean"/>
<bitfield name="DUAL_COLOR_IN_ENABLE" pos="9" type="boolean"/>
<bitfield name="ALPHA_TO_COVERAGE" pos="10" type="boolean"/>
</reg32>
src/freedreno/tests/reference/crash.log
+2 -2
View File
@@ -7068,7 +7068,7 @@ WARNING: 64b discontinuity (no _LO dword for 890d)
00000000 SP_PS_PVT_MEM_PARAM: { MEMSIZEPERITEM = 0 | HWSTACKSIZEPERTHREAD = 0 }
00000000 SP_PS_PVT_MEM_BASE: 0
00000000 SP_PS_PVT_MEM_SIZE: { TOTALPVTMEMSIZE = 0 }
00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | UNK8 }
00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND_EN }
00000000 SP_SRGB_CNTL: { 0 }
00000000 SP_PS_OUTPUT_MASK: { RT0 = 0 | RT1 = 0 | RT2 = 0 | RT3 = 0 | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 }
fcfcfc00 SP_PS_OUTPUT_CNTL: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
@@ -7136,7 +7136,7 @@ WARNING: 64b discontinuity (no _LO dword for 890d)
00000000 SP_PS_PVT_MEM_PARAM: { MEMSIZEPERITEM = 0 | HWSTACKSIZEPERTHREAD = 0 }
00000000 SP_PS_PVT_MEM_BASE: 0
00000000 SP_PS_PVT_MEM_SIZE: { TOTALPVTMEMSIZE = 0 }
00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | UNK8 }
00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND_EN }
00000000 SP_SRGB_CNTL: { 0 }
00000000 SP_PS_OUTPUT_MASK: { RT0 = 0 | RT1 = 0 | RT2 = 0 | RT3 = 0 | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 }
fcfcfc00 SP_PS_OUTPUT_CNTL: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
src/freedreno/tests/reference/crash_prefetch.log
+6 -6
View File
@@ -7675,7 +7675,7 @@ WARNING: 64b discontinuity (no _LO dword for 890d)
00000000 SP_PS_PVT_MEM_PARAM: { MEMSIZEPERITEM = 0 | HWSTACKSIZEPERTHREAD = 0 }
00000000 SP_PS_PVT_MEM_BASE: 0
00000000 SP_PS_PVT_MEM_SIZE: { TOTALPVTMEMSIZE = 0 }
00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | UNK8 }
00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND_EN }
00000000 SP_SRGB_CNTL: { 0 }
0000ffff SP_PS_OUTPUT_MASK: { RT0 = 0xf | RT1 = 0xf | RT2 = 0xf | RT3 = 0xf | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 }
fcfcfc00 SP_PS_OUTPUT_CNTL: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
@@ -7743,7 +7743,7 @@ WARNING: 64b discontinuity (no _LO dword for 890d)
00000000 SP_PS_PVT_MEM_PARAM: { MEMSIZEPERITEM = 0 | HWSTACKSIZEPERTHREAD = 0 }
00000000 SP_PS_PVT_MEM_BASE: 0
00000000 SP_PS_PVT_MEM_SIZE: { TOTALPVTMEMSIZE = 0 }
00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | UNK8 }
00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND_EN }
00000000 SP_SRGB_CNTL: { 0 }
0000ffff SP_PS_OUTPUT_MASK: { RT0 = 0xf | RT1 = 0xf | RT2 = 0xf | RT3 = 0xf | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 }
fcfcfc00 SP_PS_OUTPUT_CNTL: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
@@ -8931,7 +8931,7 @@ got cmdszdw=38
+ 00000000 SP_PS_PVT_MEM_PARAM: { MEMSIZEPERITEM = 0 | HWSTACKSIZEPERTHREAD = 0 }
+ 00000000 SP_PS_PVT_MEM_BASE: 0
+ 00000000 SP_PS_PVT_MEM_SIZE: { TOTALPVTMEMSIZE = 0 }
!+ 00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | UNK8 }
!+ 00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND_EN }
+ 00000000 SP_SRGB_CNTL: { 0 }
!+ 0000ffff SP_PS_OUTPUT_MASK: { RT0 = 0xf | RT1 = 0xf | RT2 = 0xf | RT3 = 0xf | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 }
!+ fcfcfc00 SP_PS_OUTPUT_CNTL: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
@@ -9614,7 +9614,7 @@ got cmdszdw=38
+ 00000000 SP_PS_PVT_MEM_PARAM: { MEMSIZEPERITEM = 0 | HWSTACKSIZEPERTHREAD = 0 }
+ 00000000 SP_PS_PVT_MEM_BASE: 0
+ 00000000 SP_PS_PVT_MEM_SIZE: { TOTALPVTMEMSIZE = 0 }
+ 00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | UNK8 }
+ 00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND_EN }
+ 00000000 SP_SRGB_CNTL: { 0 }
+ 0000ffff SP_PS_OUTPUT_MASK: { RT0 = 0xf | RT1 = 0xf | RT2 = 0xf | RT3 = 0xf | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 }
+ fcfcfc00 SP_PS_OUTPUT_CNTL: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
@@ -10307,7 +10307,7 @@ got cmdszdw=38
+ 00000000 SP_PS_PVT_MEM_PARAM: { MEMSIZEPERITEM = 0 | HWSTACKSIZEPERTHREAD = 0 }
+ 00000000 SP_PS_PVT_MEM_BASE: 0
+ 00000000 SP_PS_PVT_MEM_SIZE: { TOTALPVTMEMSIZE = 0 }
+ 00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | UNK8 }
+ 00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND_EN }
+ 00000000 SP_SRGB_CNTL: { 0 }
+ 0000ffff SP_PS_OUTPUT_MASK: { RT0 = 0xf | RT1 = 0xf | RT2 = 0xf | RT3 = 0xf | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 }
+ fcfcfc00 SP_PS_OUTPUT_CNTL: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
@@ -10927,7 +10927,7 @@ ESTIMATED CRASH LOCATION!
+ 00000000 SP_PS_PVT_MEM_PARAM: { MEMSIZEPERITEM = 0 | HWSTACKSIZEPERTHREAD = 0 }
+ 00000000 SP_PS_PVT_MEM_BASE: 0
+ 00000000 SP_PS_PVT_MEM_SIZE: { TOTALPVTMEMSIZE = 0 }
+ 00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | UNK8 }
+ 00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND_EN }
+ 00000000 SP_SRGB_CNTL: { 0 }
+ 0000ffff SP_PS_OUTPUT_MASK: { RT0 = 0xf | RT1 = 0xf | RT2 = 0xf | RT3 = 0xf | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 }
+ fcfcfc00 SP_PS_OUTPUT_CNTL: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
src/freedreno/tests/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log
+6 -6
View File
@@ -93,7 +93,7 @@ cmdstream[0]: 265 dwords
GRAS_MODE_CNTL: 0
00000000010580e4: 0000: 40811001 00000000
write RB_INTERP_CNTL (8809)
RB_INTERP_CNTL: { IJ_PERSP_PIXEL | COORD_MASK = 0 | UNK10 }
RB_INTERP_CNTL: { IJ_PERSP_PIXEL | COORD_MASK = 0 | INTERP_EN }
00000000010580ec: 0000: 48880901 00000401
write RB_PS_INPUT_CNTL (880a)
RB_PS_INPUT_CNTL: { FRAGCOORDSAMPLEMODE = FRAGCOORD_CENTER }
@@ -281,7 +281,7 @@ cmdstream[0]: 265 dwords
+ 00000000 GRAS_A2D_DEST_TL: { X = 0 | Y = 0 }
!+ 00ff00ff GRAS_A2D_DEST_BR: { X = 255 | Y = 255 }
!+ 00000880 GRAS_DBG_ECO_CNTL: { UNK7 | LRZCACHELOCKDIS }
!+ 00000401 RB_INTERP_CNTL: { IJ_PERSP_PIXEL | COORD_MASK = 0 | UNK10 }
!+ 00000401 RB_INTERP_CNTL: { IJ_PERSP_PIXEL | COORD_MASK = 0 | INTERP_EN }
+ 00000000 RB_PS_INPUT_CNTL: { FRAGCOORDSAMPLEMODE = FRAGCOORD_CENTER }
+ 00000000 RB_PS_OUTPUT_CNTL: { 0 }
+ 00000000 RB_SRGB_CNTL: { 0 }
@@ -941,7 +941,7 @@ cmdstream[0]: 265 dwords
GRAS_CL_INTERP_CNTL: { IJ_PERSP_PIXEL | COORD_MASK = 0 }
000000000105436c: 0000: 40800501 00000001
write RB_INTERP_CNTL (8809)
RB_INTERP_CNTL: { IJ_PERSP_PIXEL | COORD_MASK = 0 | UNK10 }
RB_INTERP_CNTL: { IJ_PERSP_PIXEL | COORD_MASK = 0 | INTERP_EN }
RB_PS_INPUT_CNTL: { FRAGCOORDSAMPLEMODE = FRAGCOORD_CENTER }
0000000001054374: 0000: 48880902 00000401 00000000
write RB_PS_SAMPLEFREQ_CNTL (8810)
@@ -1089,7 +1089,7 @@ cmdstream[0]: 265 dwords
RB_MRT[0].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_SRC_COLOR | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_DST_COLOR | ALPHA_SRC_FACTOR = FACTOR_SRC_COLOR | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_DST_COLOR }
0000000001054784: 0000: 40882002 00000780 08040804
write SP_BLEND_CNTL (a989)
SP_BLEND_CNTL: { ENABLE_BLEND = 0 | UNK8 }
SP_BLEND_CNTL: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND_EN }
0000000001054790: 0000: 40a98901 00000100
write RB_BLEND_CNTL (8865)
RB_BLEND_CNTL: { BLEND_READS_DEST = 0 | INDEPENDENT_BLEND | SAMPLE_MASK = 0xffff }
@@ -1276,7 +1276,7 @@ cmdstream[0]: 265 dwords
+ 00000000 RB_RAS_MSAA_CNTL: { SAMPLES = MSAA_ONE }
!+ 00000004 RB_DEST_MSAA_CNTL: { SAMPLES = MSAA_ONE | MSAA_DISABLE }
+ 00000000 RB_MSAA_SAMPLE_POS_CNTL: { 0 }
+ 00000401 RB_INTERP_CNTL: { IJ_PERSP_PIXEL | COORD_MASK = 0 | UNK10 }
+ 00000401 RB_INTERP_CNTL: { IJ_PERSP_PIXEL | COORD_MASK = 0 | INTERP_EN }
+ 00000000 RB_PS_INPUT_CNTL: { FRAGCOORDSAMPLEMODE = FRAGCOORD_CENTER }
+ 00000000 RB_PS_OUTPUT_CNTL: { 0 }
!+ 00000001 RB_PS_MRT_CNTL: { MRT = 1 }
@@ -1421,7 +1421,7 @@ cmdstream[0]: 265 dwords
- shaderdb: 3 last-baryf, 0 half, 2 full, 0 constlen
- shaderdb: 5 cat0, 0 cat1, 4 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7
- shaderdb: 0 sstall, 0 (ss), 0 (sy)
!+ 00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | UNK8 }
!+ 00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND_EN }
+ 00000000 SP_SRGB_CNTL: { 0 }
!+ 0000000f SP_PS_OUTPUT_MASK: { RT0 = 0xf | RT1 = 0 | RT2 = 0 | RT3 = 0 | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 }
!+ fcfcfc00 SP_PS_OUTPUT_CNTL: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
src/freedreno/tests/reference/fd-clouds.log
+2 -2
View File
@@ -5056,7 +5056,7 @@ cmdstream[0]: 1023 dwords
RB_DITHER_CNTL: { DITHER_MODE_MRT0 = DITHER_ALWAYS | DITHER_MODE_MRT1 = DITHER_ALWAYS | DITHER_MODE_MRT2 = DITHER_ALWAYS | DITHER_MODE_MRT3 = DITHER_ALWAYS | DITHER_MODE_MRT4 = DITHER_ALWAYS | DITHER_MODE_MRT5 = DITHER_ALWAYS | DITHER_MODE_MRT6 = DITHER_ALWAYS | DITHER_MODE_MRT7 = DITHER_ALWAYS }
0000000001124080: 0000: 40880e01 00005555
write SP_BLEND_CNTL (a989)
SP_BLEND_CNTL: { ENABLE_BLEND = 0 | UNK8 }
SP_BLEND_CNTL: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND_EN }
0000000001124088: 0000: 40a98901 00000100
opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords)
{ PRIM_TYPE = DI_PT_TRISTRIP | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = USE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_8_BIT | PATCH_TYPE = TESS_QUADS }
@@ -6624,7 +6624,7 @@ cmdstream[0]: 1023 dwords
- shaderdb: 0 last-baryf, 0 half, 19 full, 29 constlen
- shaderdb: 1120 cat0, 48 cat1, 551 cat2, 512 cat3, 183 cat4, 0 cat5, 0 cat6, 0 cat7
- shaderdb: 1326 sstall, 140 (ss), 0 (sy)
!+ 00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | UNK8 }
!+ 00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND_EN }
+ fcfcfc00 SP_PS_OUTPUT_CNTL: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
!+ 00000001 SP_PS_MRT_CNTL: { MRT = 1 }
!+ 00000004 SP_PS_OUTPUT[0].REG: { REGID = r1.x }
src/freedreno/tests/reference/prefetch-test.log
+6 -6
View File
@@ -6598,7 +6598,7 @@ clusters:
00000000 RB_MSAA_SAMPLE_POS_CNTL: { 0 }
00000000 RB_PROGRAMMABLE_MSAA_POS_0: { SAMPLE_0_X = 0.000000 | SAMPLE_0_Y = 0.000000 | SAMPLE_1_X = 0.000000 | SAMPLE_1_Y = 0.000000 | SAMPLE_2_X = 0.000000 | SAMPLE_2_Y = 0.000000 | SAMPLE_3_X = 0.000000 | SAMPLE_3_Y = 0.000000 }
00000000 RB_PROGRAMMABLE_MSAA_POS_1: { SAMPLE_0_X = 0.000000 | SAMPLE_0_Y = 0.000000 | SAMPLE_1_X = 0.000000 | SAMPLE_1_Y = 0.000000 | SAMPLE_2_X = 0.000000 | SAMPLE_2_Y = 0.000000 | SAMPLE_3_X = 0.000000 | SAMPLE_3_Y = 0.000000 }
00000401 RB_INTERP_CNTL: { IJ_PERSP_PIXEL | COORD_MASK = 0 | UNK10 }
00000401 RB_INTERP_CNTL: { IJ_PERSP_PIXEL | COORD_MASK = 0 | INTERP_EN }
00000000 RB_PS_INPUT_CNTL: { FRAGCOORDSAMPLEMODE = FRAGCOORD_CENTER }
00000000 RB_PS_OUTPUT_CNTL: { 0 }
00000001 RB_PS_MRT_CNTL: { MRT = 1 }
@@ -6775,7 +6775,7 @@ WARNING: 64b discontinuity (no _LO dword for 8910)
00000000 RB_MSAA_SAMPLE_POS_CNTL: { 0 }
00000000 RB_PROGRAMMABLE_MSAA_POS_0: { SAMPLE_0_X = 0.000000 | SAMPLE_0_Y = 0.000000 | SAMPLE_1_X = 0.000000 | SAMPLE_1_Y = 0.000000 | SAMPLE_2_X = 0.000000 | SAMPLE_2_Y = 0.000000 | SAMPLE_3_X = 0.000000 | SAMPLE_3_Y = 0.000000 }
00000000 RB_PROGRAMMABLE_MSAA_POS_1: { SAMPLE_0_X = 0.000000 | SAMPLE_0_Y = 0.000000 | SAMPLE_1_X = 0.000000 | SAMPLE_1_Y = 0.000000 | SAMPLE_2_X = 0.000000 | SAMPLE_2_Y = 0.000000 | SAMPLE_3_X = 0.000000 | SAMPLE_3_Y = 0.000000 }
00000401 RB_INTERP_CNTL: { IJ_PERSP_PIXEL | COORD_MASK = 0 | UNK10 }
00000401 RB_INTERP_CNTL: { IJ_PERSP_PIXEL | COORD_MASK = 0 | INTERP_EN }
00000000 RB_PS_INPUT_CNTL: { FRAGCOORDSAMPLEMODE = FRAGCOORD_CENTER }
00000000 RB_PS_OUTPUT_CNTL: { 0 }
00000001 RB_PS_MRT_CNTL: { MRT = 1 }
@@ -8031,7 +8031,7 @@ WARNING: 64b discontinuity (no _LO dword for 890d)
00000000 SP_PS_PVT_MEM_PARAM: { MEMSIZEPERITEM = 0 | HWSTACKSIZEPERTHREAD = 0 }
00000000 SP_PS_PVT_MEM_BASE: 0
00000000 SP_PS_PVT_MEM_SIZE: { TOTALPVTMEMSIZE = 0 }
00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | UNK8 }
00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND_EN }
00000000 SP_SRGB_CNTL: { 0 }
0000000f SP_PS_OUTPUT_MASK: { RT0 = 0xf | RT1 = 0 | RT2 = 0 | RT3 = 0 | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 }
fcfcfc00 SP_PS_OUTPUT_CNTL: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
@@ -8099,7 +8099,7 @@ WARNING: 64b discontinuity (no _LO dword for 890d)
00000000 SP_PS_PVT_MEM_PARAM: { MEMSIZEPERITEM = 0 | HWSTACKSIZEPERTHREAD = 0 }
00000000 SP_PS_PVT_MEM_BASE: 0
00000000 SP_PS_PVT_MEM_SIZE: { TOTALPVTMEMSIZE = 0 }
00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | UNK8 }
00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND_EN }
00000000 SP_SRGB_CNTL: { 0 }
0000000f SP_PS_OUTPUT_MASK: { RT0 = 0xf | RT1 = 0 | RT2 = 0 | RT3 = 0 | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 }
fcfcfc00 SP_PS_OUTPUT_CNTL: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
@@ -8837,7 +8837,7 @@ got cmdszdw=416
!+ 00010010 RB_RENDER_CNTL: { CCUSINGLECACHELINESIZE = 0x2 | RASTER_MODE = TYPE_TILED | RASTER_DIRECTION = LR_TB | FLAG_MRTS = 0x1 }
+ 00000000 RB_RAS_MSAA_CNTL: { SAMPLES = MSAA_ONE }
!+ 00000004 RB_DEST_MSAA_CNTL: { SAMPLES = MSAA_ONE | MSAA_DISABLE }
!+ 00000401 RB_INTERP_CNTL: { IJ_PERSP_PIXEL | COORD_MASK = 0 | UNK10 }
!+ 00000401 RB_INTERP_CNTL: { IJ_PERSP_PIXEL | COORD_MASK = 0 | INTERP_EN }
+ 00000000 RB_PS_INPUT_CNTL: { FRAGCOORDSAMPLEMODE = FRAGCOORD_CENTER }
+ 00000000 RB_PS_OUTPUT_CNTL: { 0 }
!+ 00000001 RB_PS_MRT_CNTL: { MRT = 1 }
@@ -9040,7 +9040,7 @@ got cmdszdw=416
+ 00000000 SP_PS_PVT_MEM_PARAM: { MEMSIZEPERITEM = 0 | HWSTACKSIZEPERTHREAD = 0 }
+ 00000000 SP_PS_PVT_MEM_BASE: 0
+ 00000000 SP_PS_PVT_MEM_SIZE: { TOTALPVTMEMSIZE = 0 }
!+ 00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | UNK8 }
!+ 00000100 SP_BLEND_CNTL: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND_EN }
+ 00000000 SP_SRGB_CNTL: { 0 }
!+ 0000000f SP_PS_OUTPUT_MASK: { RT0 = 0xf | RT1 = 0 | RT2 = 0 | RT3 = 0 | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 }
!+ fcfcfc00 SP_PS_OUTPUT_CNTL: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
src/freedreno/vulkan/tu_pipeline.cc
+3 -3
View File
@@ -3200,7 +3200,7 @@ tu6_emit_blend(struct tu_cs *cs,
bool dual_src_blend = tu_blend_state_is_dual_src(cb);
tu_cs_emit_regs(cs, A6XX_SP_BLEND_CNTL(.enable_blend = blend_enable_mask,
.unk8 = true,
.independent_blend_en = true,
.dual_color_in_enable =
dual_src_blend,
.alpha_to_coverage =
@@ -3251,8 +3251,8 @@ tu6_emit_blend(struct tu_cs *cs,
tu_cs_emit_regs(cs,
A6XX_RB_MRT_CONTROL(remapped_idx,
.blend = blend_enable,
.blend2 = blend_enable,
.color_blend_en = blend_enable,
.alpha_blend_en = blend_enable,
.rop_enable = logic_op_enable,
.rop_code = rop,
.component_enable = att->write_mask),
src/freedreno/vulkan/tu_shader.cc
+1 -1
View File
@@ -2054,7 +2054,7 @@ tu6_emit_fs_inputs(struct tu_cs *cs, const struct ir3_shader_variant *fs)
CONDREG(ij_regid[IJ_LINEAR_CENTROID], A6XX_RB_INTERP_CNTL_IJ_LINEAR_CENTROID) |
CONDREG(ij_regid[IJ_LINEAR_SAMPLE], A6XX_RB_INTERP_CNTL_IJ_LINEAR_SAMPLE) |
COND(need_size, A6XX_RB_INTERP_CNTL_IJ_LINEAR_PIXEL) |
COND(enable_varyings, A6XX_RB_INTERP_CNTL_UNK10) |
COND(enable_varyings, A6XX_RB_INTERP_CNTL_INTERP_EN) |
COND(need_size_persamp, A6XX_RB_INTERP_CNTL_IJ_LINEAR_SAMPLE) |
COND(fs->fragcoord_compmask != 0,
A6XX_RB_INTERP_CNTL_COORD_MASK(fs->fragcoord_compmask)));
src/gallium/drivers/freedreno/a6xx/fd6_blend.cc
+3 -3
View File
@@ -80,8 +80,8 @@ __fd6_setup_blend_variant(struct fd6_blend_stateobj *blend,
.alpha_dest_factor = fd_blend_factor(rt->alpha_dst_factor),
))
.add(A6XX_RB_MRT_CONTROL(i,
.blend = rt->blend_enable,
.blend2 = rt->blend_enable,
.color_blend_en = rt->blend_enable,
.alpha_blend_en = rt->blend_enable,
.rop_enable = cso->logicop_enable,
.rop_code = rop,
.component_enable = rt->colormask,
@@ -111,7 +111,7 @@ __fd6_setup_blend_variant(struct fd6_blend_stateobj *blend,
))
.add(A6XX_SP_BLEND_CNTL(
.enable_blend = mrt_blend,
.unk8 = true,
.independent_blend_en = cso->independent_blend_enable,
.dual_color_in_enable = blend->use_dual_src_blend,
.alpha_to_coverage = cso->alpha_to_coverage,
))
src/gallium/drivers/freedreno/a6xx/fd6_program.cc
+1 -1
View File
@@ -1139,7 +1139,7 @@ emit_fs_inputs(fd_crb &crb, const struct program_builder *b)
.ij_linear_centroid = VALIDREG(ij_regid[IJ_LINEAR_CENTROID]),
.ij_linear_sample = VALIDREG(ij_regid[IJ_LINEAR_SAMPLE]) || need_size_persamp,
.coord_mask = fs->fragcoord_compmask,
.unk10 = enable_varyings,
.interp_en = enable_varyings,
));
crb.add(A6XX_RB_PS_INPUT_CNTL(
.samplemask = VALIDREG(smask_in_regid),