nir: Clarify comment above load_buffer_amd.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21358>
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@@ -1317,9 +1317,10 @@ store("tf_r600", [])
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intrinsic("optimization_barrier_vgpr_amd", dest_comp=0, src_comp=[0],
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flags=[CAN_ELIMINATE])
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# Untyped buffer load/store instructions of arbitrary length.
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# src[] = { descriptor, vector byte offset, scalar byte offset, index offset }
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# The index offset is multiplied by the stride in the descriptor. The vertex/scalar byte offsets
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# are in bytes.
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# The index offset is multiplied by the stride in the descriptor.
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# The vector/scalar offsets are in bytes, BASE is a constant byte offset.
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intrinsic("load_buffer_amd", src_comp=[4, 1, 1, 1], dest_comp=0, indices=[BASE, MEMORY_MODES, ACCESS], flags=[CAN_ELIMINATE])
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# src[] = { store value, descriptor, vector byte offset, scalar byte offset, index offset }
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intrinsic("store_buffer_amd", src_comp=[0, 4, 1, 1, 1], indices=[BASE, WRITE_MASK, MEMORY_MODES, ACCESS])
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