nv50: add functions for swizzle resolution
We're going to try to reorder the scalar ops of a vector instr to accomodate swizzles that would otherwise require us to emit to an additional TEMP first (like MOV R0.xy, R0.zx).
This commit is contained in:
Christoph Bumiller
@@ -1322,30 +1322,69 @@ tgsi_src(struct nv50_pc *pc, int chan, const struct tgsi_full_src_register *src,
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return r;
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}
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/* returns TRUE if instruction can overwrite sources before they're read */
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/* return TRUE for ops that produce only a single result */
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static boolean
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direct2dest_op(const struct tgsi_full_instruction *insn)
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is_scalar_op(unsigned op)
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{
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if (insn->Instruction.Saturate)
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return FALSE;
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switch (insn->Instruction.Opcode) {
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case TGSI_OPCODE_COS:
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switch (op) {
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case TGSI_OPCODE_DP2:
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case TGSI_OPCODE_DP3:
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case TGSI_OPCODE_DP4:
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case TGSI_OPCODE_DPH:
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case TGSI_OPCODE_KIL:
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case TGSI_OPCODE_LIT:
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case TGSI_OPCODE_EX2:
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case TGSI_OPCODE_LG2:
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case TGSI_OPCODE_POW:
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case TGSI_OPCODE_RCP:
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case TGSI_OPCODE_RSQ:
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/*
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case TGSI_OPCODE_COS:
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case TGSI_OPCODE_KIL:
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case TGSI_OPCODE_LIT:
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case TGSI_OPCODE_SCS:
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case TGSI_OPCODE_SIN:
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*/
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return TRUE;
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default:
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return FALSE;
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}
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}
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/* Returns a bitmask indicating which dst components depend
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* on source s, component c (reverse of nv50_tgsi_src_mask).
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*/
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static unsigned
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nv50_tgsi_dst_revdep(unsigned op, int s, int c)
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{
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if (is_scalar_op(op))
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return 0x1;
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switch (op) {
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case TGSI_OPCODE_DST:
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return (1 << c) & (s ? 0xa : 0x6);
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case TGSI_OPCODE_XPD:
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switch (c) {
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case 0: return 0x6;
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case 1: return 0x5;
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case 2: return 0x3;
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case 3: return 0x0;
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default:
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assert(0);
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return 0x0;
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}
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case TGSI_OPCODE_LIT:
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case TGSI_OPCODE_SCS:
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case TGSI_OPCODE_TEX:
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case TGSI_OPCODE_TXP:
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return FALSE;
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/* these take care of dangerous swizzles themselves */
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return 0x0;
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case TGSI_OPCODE_IF:
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case TGSI_OPCODE_KIL:
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/* don't call this function for these ops */
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assert(0);
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return 0;
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default:
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return TRUE;
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/* linear vector instruction */
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return (1 << c);
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}
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}
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@@ -1393,25 +1432,6 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok)
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rdst[c] = dst[c];
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dst[c] = temp_temp(pc);
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}
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} else
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if (direct2dest_op(inst)) {
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for (c = 0; c < 4; c++) {
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if (!dst[c] || dst[c]->type != P_TEMP)
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continue;
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for (i = c + 1; i < 4; i++) {
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if (dst[c] == src[0][i] ||
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dst[c] == src[1][i] ||
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dst[c] == src[2][i])
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break;
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}
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if (i == 4)
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continue;
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assimilate = TRUE;
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rdst[c] = dst[c];
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dst[c] = alloc_temp(pc, NULL);
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}
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}
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switch (inst->Instruction.Opcode) {
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@@ -1768,6 +1788,74 @@ prep_inspect_insn(struct nv50_pc *pc, const union tgsi_full_token *tok,
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}
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}
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/* Returns a bitmask indicating which dst components need to be
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* written to temporaries first to avoid 'corrupting' sources.
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*
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* m[i] (out) indicate component to write in the i-th position
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* rdep[c] (in) bitmasks of dst[i] that require dst[c] as source
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*/
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static unsigned
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nv50_revdep_reorder(unsigned m[4], unsigned rdep[4])
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{
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unsigned i, c, x, unsafe;
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for (c = 0; c < 4; c++)
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m[c] = c;
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/* Swap as long as a dst component written earlier is depended on
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* by one written later, but the next one isn't depended on by it.
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*/
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for (c = 0; c < 3; c++) {
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if (rdep[m[c + 1]] & (1 << m[c]))
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continue; /* if next one is depended on by us */
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for (i = c + 1; i < 4; i++)
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/* if we are depended on by a later one */
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if (rdep[m[c]] & (1 << m[i]))
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break;
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if (i == 4)
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continue;
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/* now, swap */
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x = m[c];
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m[c] = m[c + 1];
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m[c + 1] = x;
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/* restart */
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c = 0;
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}
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/* mark dependencies that could not be resolved by reordering */
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for (i = 0; i < 3; ++i)
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for (c = i + 1; c < 4; ++c)
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if (rdep[m[i]] & (1 << m[c]))
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unsafe |= (1 << i);
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/* NOTE: $unsafe is with respect to order, not component */
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return unsafe;
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}
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/* Select a suitable dst register for broadcasting scalar results,
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* or return NULL if we have to allocate an extra TEMP.
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*
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* If e.g. only 1 component is written, we may also emit the final
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* result to a write-only register.
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*/
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static struct nv50_reg *
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tgsi_broadcast_dst(struct nv50_pc *pc,
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const struct tgsi_full_dst_register *fd, unsigned mask)
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{
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if (fd->DstRegister.File == TGSI_FILE_TEMPORARY) {
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int c = ffs(~mask & fd->DstRegister.WriteMask);
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if (c)
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return tgsi_dst(pc, c - 1, fd);
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} else {
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int c = ffs(fd->DstRegister.WriteMask) - 1;
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if ((1 << c) == fd->DstRegister.WriteMask)
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return tgsi_dst(pc, c, fd);
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}
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return NULL;
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}
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static unsigned
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load_fp_attrib(struct nv50_pc *pc, int i, unsigned *acc, int *mid,
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int *aid, int *p_oid)
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