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gallium: introduce PIPE_CAP_FENCE_SIGNAL v2

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Protects semaphore signaling functionality required by GL_EXT_semaphore.

v2: s/semaphore/fence

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Andres Rodriguez
2017-10-04 17:30:23 -04:00
parent 585daa2378
commit 2ab405d254
18 changed files with 18 additions and 1 deletions
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src/gallium/docs/source/screen.rst
+2
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@@ -412,6 +412,8 @@ The integer capabilities:
priorities, this returns a bitmask of PIPE_CONTEXT_PRIORITY_x for the
supported priority levels. A driver that does not support prioritized
contexts can return 0.
* ``PIPE_CAP_FENCE_SIGNAL``: True if the driver supports signaling semaphores
using fence_server_signal().
.. _pipe_capf:
src/gallium/drivers/etnaviv/etnaviv_screen.c
+1
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@@ -266,6 +266,7 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
return 0;
/* Stream output. */
src/gallium/drivers/freedreno/freedreno_screen.c
+1
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@@ -336,6 +336,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_FENCE_SIGNAL:
return 0;
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
src/gallium/drivers/i915/i915_screen.c
+1
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@@ -324,6 +324,7 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
return 0;
case PIPE_CAP_MAX_VIEWPORTS:
src/gallium/drivers/llvmpipe/lp_screen.c
+1
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@@ -359,6 +359,7 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
return 0;
}
/* should only get here on unhandled cases */
src/gallium/drivers/nouveau/nv30/nv30_screen.c
+1
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@@ -226,6 +226,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
return 0;
case PIPE_CAP_VENDOR_ID:
src/gallium/drivers/nouveau/nv50/nv50_screen.c
+1
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@@ -278,6 +278,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
return 0;
case PIPE_CAP_VENDOR_ID:
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+1
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@@ -307,6 +307,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
return 0;
case PIPE_CAP_VENDOR_ID:
src/gallium/drivers/r300/r300_screen.c
+1
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@@ -248,6 +248,7 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
return 0;
/* SWTCL-only features. */
src/gallium/drivers/r600/r600_pipe.c
+1
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@@ -409,6 +409,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
return 0;
case PIPE_CAP_DOUBLES:
src/gallium/drivers/radeonsi/si_get.c
+1
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@@ -270,6 +270,7 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
return 0;
case PIPE_CAP_NATIVE_FENCE_FD:
src/gallium/drivers/radeonsi/si_pipe.c
-1
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@@ -464,7 +464,6 @@ static struct pipe_context *si_pipe_create_context(struct pipe_screen *screen,
/*
* pipe_screen
*/
static void si_destroy_screen(struct pipe_screen* pscreen)
{
struct si_screen *sscreen = (struct si_screen *)pscreen;
src/gallium/drivers/softpipe/sp_screen.c
+1
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@@ -311,6 +311,7 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
return 0;
case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
return 4;
src/gallium/drivers/svga/svga_screen.c
+1
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@@ -454,6 +454,7 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
return 0;
}
src/gallium/drivers/swr/swr_screen.cpp
+1
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@@ -344,6 +344,7 @@ swr_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
return 0;
case PIPE_CAP_VENDOR_ID:
src/gallium/drivers/vc4/vc4_screen.c
+1
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@@ -286,6 +286,7 @@ vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
return 0;
/* Stream output. */
src/gallium/drivers/virgl/virgl_screen.c
+1
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@@ -268,6 +268,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_FENCE_SIGNAL:
return 0;
case PIPE_CAP_VENDOR_ID:
return 0x1af4;
src/gallium/include/pipe/p_defines.h
+1
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@@ -792,6 +792,7 @@ enum pipe_cap
PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES,
PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET,
PIPE_CAP_CONTEXT_PRIORITY_MASK,
PIPE_CAP_FENCE_SIGNAL,
};
/**