radeonsi/gfx11: don't set non-existent SPI_SHADER_USER_DATA_VS_x
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
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@@ -2170,7 +2170,13 @@ static void si_emit_global_shader_pointers(struct si_context *sctx, struct si_de
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{
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radeon_begin(&sctx->gfx_cs);
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if (sctx->chip_class >= GFX10) {
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if (sctx->chip_class >= GFX11) {
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radeon_emit_one_32bit_pointer(sctx, descs, R_00B030_SPI_SHADER_USER_DATA_PS_0);
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radeon_emit_one_32bit_pointer(sctx, descs, R_00B230_SPI_SHADER_USER_DATA_GS_0);
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radeon_emit_one_32bit_pointer(sctx, descs, R_00B430_SPI_SHADER_USER_DATA_HS_0);
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radeon_end();
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return;
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} else if (sctx->chip_class >= GFX10) {
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radeon_emit_one_32bit_pointer(sctx, descs, R_00B030_SPI_SHADER_USER_DATA_PS_0);
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/* HW VS stage only used in non-NGG mode. */
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radeon_emit_one_32bit_pointer(sctx, descs, R_00B130_SPI_SHADER_USER_DATA_VS_0);
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@@ -1165,7 +1165,7 @@ static void si_emit_vs_state(struct si_context *sctx, unsigned index_size)
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*
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* For TES or the GS copy shader without NGG:
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*/
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if (vs_base != R_00B130_SPI_SHADER_USER_DATA_VS_0) {
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if (GFX_VERSION <= GFX10_3 && vs_base != R_00B130_SPI_SHADER_USER_DATA_VS_0) {
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radeon_set_sh_reg(R_00B130_SPI_SHADER_USER_DATA_VS_0 + SI_SGPR_VS_STATE_BITS * 4,
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sctx->current_vs_state);
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}
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