radeonsi/gfx11: don't set non-existent SPI_SHADER_USER_DATA_VS_x

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
This commit is contained in:
Marek Olšák
2021-09-23 07:01:46 -04:00
committed by Marge Bot
parent 61291aff1f
commit 2a1c22e0cd
2 changed files with 8 additions and 2 deletions
@@ -2170,7 +2170,13 @@ static void si_emit_global_shader_pointers(struct si_context *sctx, struct si_de
{
radeon_begin(&sctx->gfx_cs);
if (sctx->chip_class >= GFX10) {
if (sctx->chip_class >= GFX11) {
radeon_emit_one_32bit_pointer(sctx, descs, R_00B030_SPI_SHADER_USER_DATA_PS_0);
radeon_emit_one_32bit_pointer(sctx, descs, R_00B230_SPI_SHADER_USER_DATA_GS_0);
radeon_emit_one_32bit_pointer(sctx, descs, R_00B430_SPI_SHADER_USER_DATA_HS_0);
radeon_end();
return;
} else if (sctx->chip_class >= GFX10) {
radeon_emit_one_32bit_pointer(sctx, descs, R_00B030_SPI_SHADER_USER_DATA_PS_0);
/* HW VS stage only used in non-NGG mode. */
radeon_emit_one_32bit_pointer(sctx, descs, R_00B130_SPI_SHADER_USER_DATA_VS_0);
@@ -1165,7 +1165,7 @@ static void si_emit_vs_state(struct si_context *sctx, unsigned index_size)
*
* For TES or the GS copy shader without NGG:
*/
if (vs_base != R_00B130_SPI_SHADER_USER_DATA_VS_0) {
if (GFX_VERSION <= GFX10_3 && vs_base != R_00B130_SPI_SHADER_USER_DATA_VS_0) {
radeon_set_sh_reg(R_00B130_SPI_SHADER_USER_DATA_VS_0 + SI_SGPR_VS_STATE_BITS * 4,
sctx->current_vs_state);
}