v3dv: CullMode and FrontFace are dynamic now

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27609>
This commit is contained in:
Alejandro Piñeiro
2024-03-24 02:24:24 +01:00
committed by Marge Bot
parent e3061e6281
commit 29c8aca881
5 changed files with 24 additions and 11 deletions
+6 -1
View File
@@ -3003,8 +3003,13 @@ v3dv_cmd_buffer_emit_pre_draw(struct v3dv_cmd_buffer *cmd_buffer,
if (dirty_uniform_state || (*dirty & V3DV_CMD_DIRTY_VERTEX_BUFFER))
v3dv_X(device, cmd_buffer_emit_gl_shader_state)(cmd_buffer);
if (*dirty & (V3DV_CMD_DIRTY_PIPELINE)) {
if (*dirty & (V3DV_CMD_DIRTY_PIPELINE) ||
BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_CULL_MODE) ||
BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_FRONT_FACE)) {
v3dv_X(device, cmd_buffer_emit_configuration_bits)(cmd_buffer);
}
if (*dirty & (V3DV_CMD_DIRTY_PIPELINE)) {
v3dv_X(device, cmd_buffer_emit_varyings_state)(cmd_buffer);
}
+2
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@@ -2905,6 +2905,8 @@ pipeline_init(struct v3dv_pipeline *pipeline,
pCreateInfo->pRasterizationState &&
!pCreateInfo->pRasterizationState->rasterizerDiscardEnable;
pipeline->rasterization_enabled = raster_enabled;
const VkPipelineViewportStateCreateInfo *vp_info =
raster_enabled ? pCreateInfo->pViewportState : NULL;
+1
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@@ -2270,6 +2270,7 @@ struct v3dv_pipeline {
*/
bool incompatible_ez_test;
bool rasterization_enabled;
bool msaa;
bool sample_rate_shading;
uint32_t sample_mask;
+15
View File
@@ -1946,6 +1946,9 @@ v3dX(cmd_buffer_emit_configuration_bits)(struct v3dv_cmd_buffer *cmd_buffer)
v3dv_cl_ensure_space_with_branch(&job->bcl, cl_packet_length(CFG_BITS));
v3dv_return_if_oom(cmd_buffer, NULL);
struct vk_dynamic_graphics_state *dyn =
&cmd_buffer->vk.dynamic_graphics_state;
cl_emit_with_prepacked(&job->bcl, CFG_BITS, pipeline->cfg_bits, config) {
#if V3D_VERSION == 42
bool enable_ez = job_update_ez_state(job, pipeline, cmd_buffer);
@@ -1953,7 +1956,19 @@ v3dX(cmd_buffer_emit_configuration_bits)(struct v3dv_cmd_buffer *cmd_buffer)
config.early_z_updates_enable = config.early_z_enable &&
pipeline->z_updates_enable;
#endif
if (pipeline->rasterization_enabled) {
assert(BITSET_TEST(dyn->set, MESA_VK_DYNAMIC_RS_CULL_MODE));
assert(BITSET_TEST(dyn->set, MESA_VK_DYNAMIC_RS_FRONT_FACE));
config.enable_forward_facing_primitive = !(dyn->rs.cull_mode & VK_CULL_MODE_FRONT_BIT);
config.enable_reverse_facing_primitive = !(dyn->rs.cull_mode & VK_CULL_MODE_BACK_BIT);
/* Seems like the hardware is backwards regarding this setting... */
config.clockwise_primitives = dyn->rs.front_face == VK_FRONT_FACE_COUNTER_CLOCKWISE;
}
}
BITSET_CLEAR(dyn->dirty, MESA_VK_DYNAMIC_RS_CULL_MODE);
BITSET_CLEAR(dyn->dirty, MESA_VK_DYNAMIC_RS_FRONT_FACE);
}
void
-10
View File
@@ -151,16 +151,6 @@ pack_cfg_bits(struct v3dv_pipeline *pipeline,
ms_info && ms_info->rasterizationSamples > VK_SAMPLE_COUNT_1_BIT;
v3dvx_pack(pipeline->cfg_bits, CFG_BITS, config) {
config.enable_forward_facing_primitive =
rs_info ? !(rs_info->cullMode & VK_CULL_MODE_FRONT_BIT) : false;
config.enable_reverse_facing_primitive =
rs_info ? !(rs_info->cullMode & VK_CULL_MODE_BACK_BIT) : false;
/* Seems like the hardware is backwards regarding this setting... */
config.clockwise_primitives =
rs_info ? rs_info->frontFace == VK_FRONT_FACE_COUNTER_CLOCKWISE : false;
/* Even if rs_info->depthBiasEnabled is true, we can decide to not
* enable it, like if there isn't a depth/stencil attachment with the
* pipeline.