aco/ra: split register assignment for phis into separate function
No fossil-db changes. Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12836>
This commit is contained in:
Daniel Schürmann
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Marge Bot
Marge Bot
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302cb5c900
commit
28fe49c35f
@@ -1911,6 +1911,136 @@ get_reg_for_operand(ra_ctx& ctx, RegisterFile& register_file,
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update_renames(ctx, register_file, parallelcopy, instr, rename_not_killed_ops | fill_killed_ops);
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}
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void
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get_regs_for_phis(ra_ctx& ctx, Block& block, RegisterFile& register_file,
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std::vector<aco_ptr<Instruction>>& instructions, IDSet& live_in)
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{
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/* look up the affinities */
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for (aco_ptr<Instruction>& phi : block.instructions) {
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if (!is_phi(phi))
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break;
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Definition& definition = phi->definitions[0];
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if (definition.isKill() || definition.isFixed())
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continue;
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if (ctx.assignments[definition.tempId()].affinity &&
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ctx.assignments[ctx.assignments[definition.tempId()].affinity].assigned) {
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assignment& affinity = ctx.assignments[ctx.assignments[definition.tempId()].affinity];
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assert(affinity.rc == definition.regClass());
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PhysReg reg = affinity.reg;
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if (reg == scc) {
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/* only use scc if all operands are already placed there */
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bool use_scc = std::all_of(phi->operands.begin(), phi->operands.end(),
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[](const Operand& op) {
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return op.isTemp() && op.isFixed() && op.physReg() == scc;
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});
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if (!use_scc)
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continue;
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}
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/* only assign if register is still free */
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if (!register_file.test(reg, definition.bytes())) {
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definition.setFixed(reg);
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register_file.fill(definition);
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ctx.assignments[definition.tempId()].set(definition);
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}
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}
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}
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/* find registers for phis without affinity or where the register was blocked */
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for (aco_ptr<Instruction>& phi : block.instructions) {
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if (!is_phi(phi))
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break;
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Definition& definition = phi->definitions[0];
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if (definition.isKill())
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continue;
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if (!definition.isFixed()) {
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std::vector<std::pair<Operand, Definition>> parallelcopy;
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/* try to find a register that is used by at least one operand */
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for (int i = phi->operands.size() - 1; i >= 0; i--) {
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/* by going backwards, we aim to avoid copies in else-blocks */
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const Operand& op = phi->operands[i];
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if (!op.isTemp() || !op.isFixed())
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continue;
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PhysReg reg = op.physReg();
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/* we tried this already on the previous loop */
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if (reg == scc)
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continue;
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if (get_reg_specified(ctx, register_file, definition.regClass(), phi, reg)) {
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definition.setFixed(reg);
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break;
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}
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}
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if (!definition.isFixed()) {
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definition.setFixed(
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get_reg(ctx, register_file, definition.getTemp(), parallelcopy, phi));
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update_renames(ctx, register_file, parallelcopy, phi, rename_not_killed_ops);
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}
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/* process parallelcopy */
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for (std::pair<Operand, Definition> pc : parallelcopy) {
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/* see if it's a copy from a different phi */
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// TODO: prefer moving some previous phis over live-ins
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// TODO: somehow prevent phis fixed before the RA from being updated (shouldn't be a
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// problem in practice since they can only be fixed to exec)
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Instruction* prev_phi = NULL;
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std::vector<aco_ptr<Instruction>>::iterator phi_it;
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for (phi_it = instructions.begin(); phi_it != instructions.end(); ++phi_it) {
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if ((*phi_it)->definitions[0].tempId() == pc.first.tempId())
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prev_phi = phi_it->get();
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}
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if (prev_phi) {
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/* if so, just update that phi's register */
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prev_phi->definitions[0].setFixed(pc.second.physReg());
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ctx.assignments[prev_phi->definitions[0].tempId()].set(pc.second);
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continue;
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}
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/* rename */
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std::unordered_map<unsigned, Temp>::iterator orig_it =
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ctx.orig_names.find(pc.first.tempId());
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Temp orig = pc.first.getTemp();
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if (orig_it != ctx.orig_names.end())
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orig = orig_it->second;
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else
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ctx.orig_names[pc.second.tempId()] = orig;
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ctx.renames[block.index][orig.id()] = pc.second.getTemp();
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/* otherwise, this is a live-in and we need to create a new phi
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* to move it in this block's predecessors */
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aco_opcode opcode =
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pc.first.getTemp().is_linear() ? aco_opcode::p_linear_phi : aco_opcode::p_phi;
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std::vector<unsigned>& preds =
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pc.first.getTemp().is_linear() ? block.linear_preds : block.logical_preds;
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aco_ptr<Instruction> new_phi{
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create_instruction<Pseudo_instruction>(opcode, Format::PSEUDO, preds.size(), 1)};
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new_phi->definitions[0] = pc.second;
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for (unsigned i = 0; i < preds.size(); i++)
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new_phi->operands[i] = Operand(pc.first);
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instructions.emplace_back(std::move(new_phi));
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/* Remove from live_out_per_block (now used for live-in), because handle_loop_phis()
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* would re-create this phi later if this is a loop header.
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*/
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live_in.erase(orig.id());
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}
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register_file.fill(definition);
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ctx.assignments[definition.tempId()].set(definition);
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}
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/* update phi affinities */
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for (const Operand& op : phi->operands) {
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if (op.isTemp() && op.regClass() == phi->definitions[0].regClass())
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ctx.assignments[op.tempId()].affinity = definition.tempId();
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}
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instructions.emplace_back(std::move(phi));
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}
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}
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Temp
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read_variable(ra_ctx& ctx, Temp val, unsigned block_idx)
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{
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@@ -2266,139 +2396,10 @@ register_allocation(Program* program, std::vector<IDSet>& live_out_per_block, ra
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ctx.war_hint.reset();
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std::vector<aco_ptr<Instruction>> instructions;
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std::vector<aco_ptr<Instruction>>::iterator instr_it;
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/* this is a slight adjustment from the paper as we already have phi nodes:
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* We consider them incomplete phis and only handle the definition. */
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/* look up the affinities */
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for (instr_it = block.instructions.begin(); instr_it != block.instructions.end();
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++instr_it) {
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aco_ptr<Instruction>& phi = *instr_it;
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if (!is_phi(phi))
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break;
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Definition& definition = phi->definitions[0];
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if (definition.isKill() || definition.isFixed())
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continue;
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if (ctx.assignments[definition.tempId()].affinity &&
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ctx.assignments[ctx.assignments[definition.tempId()].affinity].assigned) {
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assignment& affinity = ctx.assignments[ctx.assignments[definition.tempId()].affinity];
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assert(affinity.rc == definition.regClass());
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PhysReg reg = affinity.reg;
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if (reg == scc) {
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/* only use scc if all operands are already placed there */
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bool use_scc =
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std::all_of(phi->operands.begin(), phi->operands.end(),
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[](const Operand& op)
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{ return op.isTemp() && op.isFixed() && op.physReg() == scc; });
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if (!use_scc)
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continue;
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}
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/* only assign if register is still free */
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if (!register_file.test(reg, definition.bytes())) {
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definition.setFixed(reg);
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register_file.fill(definition);
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ctx.assignments[definition.tempId()].set(definition);
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}
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}
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}
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/* find registers for phis without affinity or where the register was blocked */
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for (instr_it = block.instructions.begin(); instr_it != block.instructions.end();
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++instr_it) {
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aco_ptr<Instruction>& phi = *instr_it;
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if (!is_phi(phi))
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break;
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Definition& definition = phi->definitions[0];
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if (definition.isKill())
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continue;
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if (!definition.isFixed()) {
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std::vector<std::pair<Operand, Definition>> parallelcopy;
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/* try to find a register that is used by at least one operand */
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for (int i = phi->operands.size() - 1; i >= 0; i--) {
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/* by going backwards, we aim to avoid copies in else-blocks */
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const Operand& op = phi->operands[i];
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if (!op.isTemp() || !op.isFixed())
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continue;
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PhysReg reg = op.physReg();
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/* we tried this already on the previous loop */
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if (reg == scc)
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continue;
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if (get_reg_specified(ctx, register_file, definition.regClass(), phi, reg)) {
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definition.setFixed(reg);
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break;
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}
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}
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if (!definition.isFixed()) {
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definition.setFixed(
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get_reg(ctx, register_file, definition.getTemp(), parallelcopy, phi));
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update_renames(ctx, register_file, parallelcopy, phi, rename_not_killed_ops);
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}
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/* process parallelcopy */
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for (std::pair<Operand, Definition> pc : parallelcopy) {
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/* see if it's a copy from a different phi */
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// TODO: prefer moving some previous phis over live-ins
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// TODO: somehow prevent phis fixed before the RA from being updated (shouldn't be a
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// problem in practice since they can only be fixed to exec)
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Instruction* prev_phi = NULL;
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std::vector<aco_ptr<Instruction>>::iterator phi_it;
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for (phi_it = instructions.begin(); phi_it != instructions.end(); ++phi_it) {
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if ((*phi_it)->definitions[0].tempId() == pc.first.tempId())
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prev_phi = phi_it->get();
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}
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if (prev_phi) {
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/* if so, just update that phi's register */
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prev_phi->definitions[0].setFixed(pc.second.physReg());
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ctx.assignments[prev_phi->definitions[0].tempId()].set(pc.second);
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continue;
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}
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/* rename */
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std::unordered_map<unsigned, Temp>::iterator orig_it =
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ctx.orig_names.find(pc.first.tempId());
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Temp orig = pc.first.getTemp();
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if (orig_it != ctx.orig_names.end())
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orig = orig_it->second;
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else
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ctx.orig_names[pc.second.tempId()] = orig;
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ctx.renames[block.index][orig.id()] = pc.second.getTemp();
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/* otherwise, this is a live-in and we need to create a new phi
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* to move it in this block's predecessors */
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aco_opcode opcode =
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pc.first.getTemp().is_linear() ? aco_opcode::p_linear_phi : aco_opcode::p_phi;
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std::vector<unsigned>& preds =
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pc.first.getTemp().is_linear() ? block.linear_preds : block.logical_preds;
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aco_ptr<Instruction> new_phi{
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create_instruction<Pseudo_instruction>(opcode, Format::PSEUDO, preds.size(), 1)};
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new_phi->definitions[0] = pc.second;
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for (unsigned i = 0; i < preds.size(); i++)
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new_phi->operands[i] = Operand(pc.first);
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instructions.emplace_back(std::move(new_phi));
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/* Remove from live_out_per_block (now used for live-in), because handle_loop_phis()
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* would re-create this phi later if this is a loop header.
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*/
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live_out_per_block[block.index].erase(orig.id());
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}
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register_file.fill(definition);
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ctx.assignments[definition.tempId()].set(definition);
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}
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/* update phi affinities */
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for (const Operand& op : phi->operands) {
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if (op.isTemp() && op.regClass() == phi->definitions[0].regClass())
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ctx.assignments[op.tempId()].affinity = definition.tempId();
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}
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instructions.emplace_back(std::move(*instr_it));
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}
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get_regs_for_phis(ctx, block, register_file, instructions, live_out_per_block[block.index]);
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/* fill in sgpr_live_in */
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for (unsigned i = 0; i <= ctx.max_used_sgpr; i++)
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@@ -2406,6 +2407,9 @@ register_allocation(Program* program, std::vector<IDSet>& live_out_per_block, ra
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sgpr_live_in[block.index][127] = register_file[scc];
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/* Handle all other instructions of the block */
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auto NonPhi = [](aco_ptr<Instruction>& instr) -> bool { return instr && !is_phi(instr); };
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std::vector<aco_ptr<Instruction>>::iterator instr_it =
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std::find_if(block.instructions.begin(), block.instructions.end(), NonPhi);
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for (; instr_it != block.instructions.end(); ++instr_it) {
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aco_ptr<Instruction>& instr = *instr_it;
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