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intel/ds: add pipe control reasons to perfetto flushes

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Add up to four reasons per flush to perfetto flushes. PC reasons
will help debuggers understand why flushes were required, and
perhaps provide hints as to how they can be avoided.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27400>
This commit is contained in:
Felix DeGrood
2024-02-07 18:28:16 +00:00
committed by Marge Bot
parent 3f8ff988fa
commit 26da033c91
6 changed files with 45 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/iris/iris_state.c
+1 -1
View File
@@ -9982,7 +9982,7 @@ iris_emit_raw_pipe_control(struct iris_batch *batch,
if (trace_pc) {
trace_intel_end_stall(&batch->trace, flags,
iris_utrace_pipe_flush_bit_to_ds_stall_flag,
reason);
reason,0,0,0);
}
iris_batch_sync_region_end(batch);
src/intel/ds/intel_driver_ds.cc
+8 -2
View File
@@ -334,7 +334,7 @@ custom_trace_payload_as_extra_end_stall(perfetto::protos::pbzero::GpuRenderStage
auto data = event->add_extra_data();
data->set_name("stall_reason");
snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s : %s",
snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s : %s%s%s%s%s%s%s",
(payload->flags & INTEL_DS_DEPTH_CACHE_FLUSH_BIT) ? "+depth_flush" : "",
(payload->flags & INTEL_DS_DATA_CACHE_FLUSH_BIT) ? "+dc_flush" : "",
(payload->flags & INTEL_DS_HDC_PIPELINE_FLUSH_BIT) ? "+hdc_flush" : "",
@@ -352,7 +352,13 @@ custom_trace_payload_as_extra_end_stall(perfetto::protos::pbzero::GpuRenderStage
(payload->flags & INTEL_DS_UNTYPED_DATAPORT_CACHE_FLUSH_BIT) ? "+udp_flush" : "",
(payload->flags & INTEL_DS_END_OF_PIPE_BIT) ? "+eop" : "",
(payload->flags & INTEL_DS_CCS_CACHE_FLUSH_BIT) ? "+ccs_flush" : "",
payload->reason ? payload->reason : "unknown");
(payload->reason1) ? payload->reason1 : "unknown",
(payload->reason2) ? "; " : "",
(payload->reason2) ? payload->reason2 : "",
(payload->reason3) ? "; " : "",
(payload->reason3) ? payload->reason3 : "",
(payload->reason4) ? "; " : "",
(payload->reason4) ? payload->reason4 : "");
assert(strlen(buf) > 0);
src/intel/ds/intel_tracepoints.py
+16 -4
View File
@@ -204,8 +204,14 @@ def define_tracepoints(args):
for a in args:
fmt += '%s'
exprs.append('(__entry->flags & INTEL_DS_{0}_BIT) ? "+{1}" : ""'.format(a[0], a[1]))
fmt += ' : %s'
exprs.append('__entry->reason ? __entry->reason : "unknown"')
fmt += ' : %s%s%s%s%s%s%s'
exprs.append('(__entry->reason1) ? __entry->reason1 : "unknown"')
exprs.append('(__entry->reason2) ? "; " : ""')
exprs.append('(__entry->reason2) ? __entry->reason2 : ""')
exprs.append('(__entry->reason3) ? "; " : ""')
exprs.append('(__entry->reason3) ? __entry->reason3 : ""')
exprs.append('(__entry->reason4) ? "; " : ""')
exprs.append('(__entry->reason4) ? __entry->reason4 : ""')
# To printout flags
# fmt += '(0x%08x)'
# exprs.append('__entry->flags')
@@ -234,9 +240,15 @@ def define_tracepoints(args):
begin_end_tp('stall',
tp_args=[ArgStruct(type='uint32_t', var='flags'),
ArgStruct(type='intel_ds_stall_cb_t', var='decode_cb'),
ArgStruct(type='const char *', var='reason'),],
ArgStruct(type='const char *', var='reason1'),
ArgStruct(type='const char *', var='reason2'),
ArgStruct(type='const char *', var='reason3'),
ArgStruct(type='const char *', var='reason4'),],
tp_struct=[Arg(type='uint32_t', name='flags', var='decode_cb(flags)', c_format='0x%x'),
Arg(type='const char *', name='reason', var='reason', c_format='%s'),],
Arg(type='const char *', name='reason1', var='reason1', c_format='%s'),
Arg(type='const char *', name='reason2', var='reason2', c_format='%s'),
Arg(type='const char *', name='reason3', var='reason3', c_format='%s'),
Arg(type='const char *', name='reason4', var='reason4', c_format='%s'),],
tp_print=stall_args(stall_flags),
tp_default_enabled=False,
end_pipelined=False)
src/intel/vulkan/anv_private.h
+8
View File
@@ -3664,6 +3664,8 @@ struct anv_cmd_state {
struct anv_cmd_ray_tracing_state rt;
enum anv_pipe_bits pending_pipe_bits;
const char * pc_reasons[4];
uint32_t pc_reasons_count;
/**
* Whether the last programmed STATE_BASE_ADDRESS references
@@ -5832,6 +5834,12 @@ anv_add_pending_pipe_bits(struct anv_cmd_buffer* cmd_buffer,
anv_dump_pipe_bits(bits, stdout);
fprintf(stdout, "reason: %s\n", reason);
}
/* store reason, if space available*/
if (cmd_buffer->state.pc_reasons_count <
ARRAY_SIZE(cmd_buffer->state.pc_reasons)) {
cmd_buffer->state.pc_reasons[
cmd_buffer->state.pc_reasons_count++] = reason;
}
}
struct anv_performance_configuration_intel {
src/intel/vulkan/genX_cmd_buffer.c
+10 -1
View File
@@ -1936,7 +1936,16 @@ genX(cmd_buffer_apply_pipe_flushes)(struct anv_cmd_buffer *cmd_buffer)
if (trace_flush) {
trace_intel_end_stall(&cmd_buffer->trace,
bits & ~cmd_buffer->state.pending_pipe_bits,
anv_pipe_flush_bit_to_ds_stall_flag, NULL);
anv_pipe_flush_bit_to_ds_stall_flag,
cmd_buffer->state.pc_reasons[0],
cmd_buffer->state.pc_reasons[1],
cmd_buffer->state.pc_reasons[2],
cmd_buffer->state.pc_reasons[3]);
cmd_buffer->state.pc_reasons[0] = NULL;
cmd_buffer->state.pc_reasons[1] = NULL;
cmd_buffer->state.pc_reasons[2] = NULL;
cmd_buffer->state.pc_reasons[3] = NULL;
cmd_buffer->state.pc_reasons_count = 0;
}
}
src/intel/vulkan_hasvk/genX_cmd_buffer.c
+2 -1
View File
@@ -1898,7 +1898,8 @@ genX(cmd_buffer_apply_pipe_flushes)(struct anv_cmd_buffer *cmd_buffer)
if (trace_flush) {
trace_intel_end_stall(&cmd_buffer->trace, bits,
anv_pipe_flush_bit_to_ds_stall_flag, NULL);
anv_pipe_flush_bit_to_ds_stall_flag,
NULL, NULL, NULL, NULL);
}
}