radeonsi: remove an obsolete comment about SMEM stores
We don't use SMEM store instructions (only supported by gfx10). Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
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@@ -92,12 +92,8 @@ static void gfx10_emit_barrier(struct si_context *ctx, struct radeon_cmdbuf *cs)
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if (flags & SI_BARRIER_INV_ICACHE)
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gcr_cntl |= S_586_GLI_INV(V_586_GLI_ALL);
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if (flags & SI_BARRIER_INV_SMEM) {
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/* TODO: When writing to the SMEM L1 cache, we need to set SEQ
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* to FORWARD when both L1 and L2 are written out (WB or INV).
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*/
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if (flags & SI_BARRIER_INV_SMEM)
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gcr_cntl |= S_586_GL1_INV(1) | S_586_GLK_INV(1);
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}
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if (flags & SI_BARRIER_INV_VMEM)
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gcr_cntl |= S_586_GL1_INV(1) | S_586_GLV_INV(1);
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