freedreno/a6xx: set missing bary sysvals
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>
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Jonathan Marek
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Marge Bot
Marge Bot
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dadfb4ec58
commit
2453f2bdb7
@@ -303,7 +303,7 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd_screen *screen,
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uint32_t vertex_regid, instance_regid, layer_regid, primitive_regid;
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uint32_t hs_invocation_regid;
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uint32_t tess_coord_x_regid, tess_coord_y_regid, hs_patch_regid, ds_patch_regid;
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uint32_t ij_pix_regid, ij_samp_regid, ij_cent_regid, ij_size_regid;
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uint32_t ij_regid[IJ_COUNT];
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uint32_t gs_header_regid;
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enum a3xx_threadsize fssz;
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uint8_t psize_loc = ~0, pos_loc = ~0, layer_loc = ~0;
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@@ -380,20 +380,18 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd_screen *screen,
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face_regid = ir3_find_sysval_regid(fs, SYSTEM_VALUE_FRONT_FACE);
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coord_regid = ir3_find_sysval_regid(fs, SYSTEM_VALUE_FRAG_COORD);
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zwcoord_regid = next_regid(coord_regid, 2);
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ij_pix_regid = ir3_find_sysval_regid(fs, SYSTEM_VALUE_BARYCENTRIC_PERSP_PIXEL);
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ij_samp_regid = ir3_find_sysval_regid(fs, SYSTEM_VALUE_BARYCENTRIC_PERSP_SAMPLE);
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ij_cent_regid = ir3_find_sysval_regid(fs, SYSTEM_VALUE_BARYCENTRIC_PERSP_CENTROID);
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ij_size_regid = ir3_find_sysval_regid(fs, SYSTEM_VALUE_BARYCENTRIC_PERSP_SIZE);
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posz_regid = ir3_find_output_regid(fs, FRAG_RESULT_DEPTH);
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smask_regid = ir3_find_output_regid(fs, FRAG_RESULT_SAMPLE_MASK);
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for (unsigned i = 0; i < ARRAY_SIZE(ij_regid); i++)
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ij_regid[i] = ir3_find_sysval_regid(fs, SYSTEM_VALUE_BARYCENTRIC_PERSP_PIXEL + i);
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/* If we have pre-dispatch texture fetches, then ij_pix should not
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* be DCE'd, even if not actually used in the shader itself:
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*/
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if (fs->num_sampler_prefetch > 0) {
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assert(VALIDREG(ij_pix_regid));
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assert(VALIDREG(ij_regid[IJ_PERSP_PIXEL]));
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/* also, it seems like ij_pix is *required* to be r0.x */
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assert(ij_pix_regid == regid(0, 0));
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assert(ij_regid[IJ_PERSP_PIXEL] == regid(0, 0));
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}
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/* we can't write gl_SampleMask for !msaa.. if b0 is zero then we
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@@ -637,14 +635,16 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd_screen *screen,
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OUT_RING(ring, A6XX_HLSQ_CONTROL_2_REG_FACEREGID(face_regid) |
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A6XX_HLSQ_CONTROL_2_REG_SAMPLEID(samp_id_regid) |
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A6XX_HLSQ_CONTROL_2_REG_SAMPLEMASK(smask_in_regid) |
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A6XX_HLSQ_CONTROL_2_REG_SIZE(ij_size_regid));
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OUT_RING(ring, A6XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL(ij_pix_regid) |
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A6XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID(ij_cent_regid) |
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0xfc00fc00); /* XXX */
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A6XX_HLSQ_CONTROL_2_REG_SIZE(ij_regid[IJ_PERSP_SIZE]));
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OUT_RING(ring,
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A6XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL(ij_regid[IJ_PERSP_PIXEL]) |
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A6XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL(ij_regid[IJ_LINEAR_PIXEL]) |
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A6XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID(ij_regid[IJ_PERSP_CENTROID]) |
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A6XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID(ij_regid[IJ_LINEAR_CENTROID]));
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OUT_RING(ring, A6XX_HLSQ_CONTROL_4_REG_XYCOORDREGID(coord_regid) |
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A6XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID(zwcoord_regid) |
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A6XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE(ij_samp_regid) |
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0x0000fc00); /* XXX */
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A6XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE(ij_regid[IJ_PERSP_SAMPLE]) |
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A6XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE(ij_regid[IJ_LINEAR_SAMPLE]));
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OUT_RING(ring, 0xfc); /* XXX */
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OUT_PKT4(ring, REG_A6XX_HLSQ_UNKNOWN_B980, 1);
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@@ -666,33 +666,43 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd_screen *screen,
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OUT_PKT4(ring, REG_A6XX_VPC_GS_SIV_CNTL, 1);
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OUT_RING(ring, 0x0000ffff); /* XXX */
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bool need_size = fs->frag_face || fs->fragcoord_compmask != 0;
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bool need_size_persamp = false;
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if (VALIDREG(ij_regid[IJ_PERSP_SIZE])) {
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if (sample_shading)
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need_size_persamp = true;
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else
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need_size = true;
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}
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if (VALIDREG(ij_regid[IJ_LINEAR_PIXEL]))
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need_size = true;
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/* XXX: enable bits for linear centroid and linear sample bary */
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OUT_PKT4(ring, REG_A6XX_GRAS_CNTL, 1);
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OUT_RING(ring,
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CONDREG(ij_pix_regid, A6XX_GRAS_CNTL_IJ_PERSP_PIXEL) |
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CONDREG(ij_cent_regid, A6XX_GRAS_CNTL_IJ_PERSP_CENTROID) |
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CONDREG(ij_samp_regid, A6XX_GRAS_CNTL_IJ_PERSP_SAMPLE) |
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COND(VALIDREG(ij_size_regid) && !sample_shading, A6XX_GRAS_CNTL_SIZE) |
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COND(VALIDREG(ij_size_regid) && sample_shading, A6XX_GRAS_CNTL_SIZE_PERSAMP) |
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COND(fs->fragcoord_compmask != 0, A6XX_GRAS_CNTL_SIZE |
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A6XX_GRAS_CNTL_COORD_MASK(fs->fragcoord_compmask)) |
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COND(fs->frag_face, A6XX_GRAS_CNTL_SIZE));
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CONDREG(ij_regid[IJ_PERSP_PIXEL], A6XX_GRAS_CNTL_IJ_PERSP_PIXEL) |
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CONDREG(ij_regid[IJ_PERSP_CENTROID], A6XX_GRAS_CNTL_IJ_PERSP_CENTROID) |
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CONDREG(ij_regid[IJ_PERSP_SAMPLE], A6XX_GRAS_CNTL_IJ_PERSP_SAMPLE) |
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COND(need_size, A6XX_GRAS_CNTL_SIZE) |
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COND(need_size_persamp, A6XX_GRAS_CNTL_SIZE_PERSAMP) |
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COND(fs->fragcoord_compmask != 0, A6XX_GRAS_CNTL_COORD_MASK(fs->fragcoord_compmask)));
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OUT_PKT4(ring, REG_A6XX_RB_RENDER_CONTROL0, 2);
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OUT_RING(ring,
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CONDREG(ij_pix_regid, A6XX_RB_RENDER_CONTROL0_IJ_PERSP_PIXEL) |
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CONDREG(ij_cent_regid, A6XX_RB_RENDER_CONTROL0_IJ_PERSP_CENTROID) |
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CONDREG(ij_samp_regid, A6XX_RB_RENDER_CONTROL0_IJ_PERSP_SAMPLE) |
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CONDREG(ij_regid[IJ_PERSP_PIXEL], A6XX_RB_RENDER_CONTROL0_IJ_PERSP_PIXEL) |
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CONDREG(ij_regid[IJ_PERSP_CENTROID], A6XX_RB_RENDER_CONTROL0_IJ_PERSP_CENTROID) |
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CONDREG(ij_regid[IJ_PERSP_SAMPLE], A6XX_RB_RENDER_CONTROL0_IJ_PERSP_SAMPLE) |
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COND(need_size, A6XX_RB_RENDER_CONTROL0_SIZE) |
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COND(enable_varyings, A6XX_RB_RENDER_CONTROL0_UNK10) |
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COND(VALIDREG(ij_size_regid) && !sample_shading, A6XX_RB_RENDER_CONTROL0_SIZE) |
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COND(VALIDREG(ij_size_regid) && sample_shading, A6XX_RB_RENDER_CONTROL0_SIZE_PERSAMP) |
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COND(fs->fragcoord_compmask != 0, A6XX_RB_RENDER_CONTROL0_SIZE |
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A6XX_RB_RENDER_CONTROL0_COORD_MASK(fs->fragcoord_compmask)) |
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COND(fs->frag_face, A6XX_RB_RENDER_CONTROL0_SIZE));
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COND(need_size_persamp, A6XX_RB_RENDER_CONTROL0_SIZE_PERSAMP) |
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COND(fs->fragcoord_compmask != 0,
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A6XX_RB_RENDER_CONTROL0_COORD_MASK(fs->fragcoord_compmask)));
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OUT_RING(ring,
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CONDREG(smask_in_regid, A6XX_RB_RENDER_CONTROL1_SAMPLEMASK) |
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CONDREG(samp_id_regid, A6XX_RB_RENDER_CONTROL1_SAMPLEID) |
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CONDREG(ij_size_regid, A6XX_RB_RENDER_CONTROL1_SIZE) |
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CONDREG(ij_regid[IJ_PERSP_SIZE], A6XX_RB_RENDER_CONTROL1_SIZE) |
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COND(fs->frag_face, A6XX_RB_RENDER_CONTROL1_FACENESS));
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OUT_PKT4(ring, REG_A6XX_RB_SAMPLE_CNTL, 1);
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