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radeon: enable tiling fallbacks in 3D driver.

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Only really got good testing on r500 so far, need to enable in
DDX and play some more.
This commit is contained in:
Dave Airlie
2009-08-07 19:40:05 +10:00
parent 2dc3fb7803
commit 239c8bfb10
3 changed files with 28 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/mesa/drivers/dri/radeon/radeon_bo_drm.h
+16
View File
@@ -83,6 +83,10 @@ struct radeon_bo_funcs {
int (*bo_unmap)(struct radeon_bo *bo);
int (*bo_wait)(struct radeon_bo *bo);
int (*bo_is_static)(struct radeon_bo *bo);
int (*bo_set_tiling)(struct radeon_bo *bo, uint32_t tiling_flags,
uint32_t pitch);
int (*bo_get_tiling)(struct radeon_bo *bo, uint32_t *tiling_flags,
uint32_t *pitch);
};
struct radeon_bo_manager {
@@ -187,6 +191,18 @@ static inline int _radeon_bo_wait(struct radeon_bo *bo,
return bo->bom->funcs->bo_wait(bo);
}
static inline int radeon_bo_set_tiling(struct radeon_bo *bo,
uint32_t tiling_flags, uint32_t pitch)
{
return bo->bom->funcs->bo_set_tiling(bo, tiling_flags, pitch);
}
static inline int radeon_bo_get_tiling(struct radeon_bo *bo,
uint32_t *tiling_flags, uint32_t *pitch)
{
return bo->bom->funcs->bo_get_tiling(bo, tiling_flags, pitch);
}
static inline int radeon_bo_is_static(struct radeon_bo *bo)
{
if (bo->bom->funcs->bo_is_static)
src/mesa/drivers/dri/radeon/radeon_bo_legacy.c
+2
View File
@@ -577,6 +577,8 @@ static struct radeon_bo_funcs bo_legacy_funcs = {
bo_unmap,
NULL,
bo_is_static,
NULL,
NULL,
};
static int bo_vram_validate(struct radeon_bo *bo,
src/mesa/drivers/dri/radeon/radeon_common_context.c
+10 -1
View File
@@ -762,8 +762,10 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
bo = depth_bo;
radeon_bo_ref(bo);
} else {
uint32_t tiling_flags = 0, pitch = 0;
int ret;
#ifdef RADEON_DEBUG_BO
bo = radeon_bo_open(radeon->radeonScreen->bom,
bo = radeon_bo_open(radeon->radeonScreen->bom,
buffers[i].name,
0,
0,
@@ -784,6 +786,13 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
regname, buffers[i].name);
}
ret = radeon_bo_get_tiling(bo, &tiling_flags, &pitch);
if (tiling_flags & RADEON_TILING_MACRO)
bo->flags |= RADEON_BO_FLAGS_MACRO_TILE;
if (tiling_flags & RADEON_TILING_MICRO)
bo->flags |= RADEON_BO_FLAGS_MICRO_TILE;
}
if (buffers[i].attachment == __DRI_BUFFER_DEPTH) {