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radv: Add an internal indirect dispatch command.

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Avoiding the entire buffer dance.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12840>
This commit is contained in:
Bas Nieuwenhuizen
2021-09-01 01:29:40 +02:00
committed by Marge Bot
parent 8500e9e1f0
commit 237a979419
2 changed files with 25 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/vulkan/radv_cmd_buffer.c
+22 -15
View File
@@ -6265,8 +6265,8 @@ struct radv_dispatch_info {
/**
* Indirect compute parameters resource.
*/
struct radv_buffer *indirect;
uint64_t indirect_offset;
struct radeon_winsys_bo *indirect;
uint64_t va;
};
static void
@@ -6292,19 +6292,15 @@ radv_emit_dispatch_packets(struct radv_cmd_buffer *cmd_buffer, struct radv_pipel
}
if (info->indirect) {
uint64_t va = radv_buffer_get_va(info->indirect->bo);
va += info->indirect->offset + info->indirect_offset;
radv_cs_add_buffer(ws, cs, info->indirect->bo);
radv_cs_add_buffer(ws, cs, info->indirect);
if (loc->sgpr_idx != -1) {
for (unsigned i = 0; i < 3; ++i) {
radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
radeon_emit(cs,
COPY_DATA_SRC_SEL(COPY_DATA_SRC_MEM) | COPY_DATA_DST_SEL(COPY_DATA_REG));
radeon_emit(cs, (va + 4 * i));
radeon_emit(cs, (va + 4 * i) >> 32);
radeon_emit(cs, (info->va + 4 * i));
radeon_emit(cs, (info->va + 4 * i) >> 32);
radeon_emit(cs, ((R_00B900_COMPUTE_USER_DATA_0 + loc->sgpr_idx * 4) >> 2) + i);
radeon_emit(cs, 0);
}
@@ -6312,14 +6308,14 @@ radv_emit_dispatch_packets(struct radv_cmd_buffer *cmd_buffer, struct radv_pipel
if (radv_cmd_buffer_uses_mec(cmd_buffer)) {
radeon_emit(cs, PKT3(PKT3_DISPATCH_INDIRECT, 2, predicating) | PKT3_SHADER_TYPE_S(1));
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
radeon_emit(cs, info->va);
radeon_emit(cs, info->va >> 32);
radeon_emit(cs, dispatch_initiator);
} else {
radeon_emit(cs, PKT3(PKT3_SET_BASE, 2, 0) | PKT3_SHADER_TYPE_S(1));
radeon_emit(cs, 1);
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
radeon_emit(cs, info->va);
radeon_emit(cs, info->va >> 32);
radeon_emit(cs, PKT3(PKT3_DISPATCH_INDIRECT, 1, predicating) | PKT3_SHADER_TYPE_S(1));
radeon_emit(cs, 0);
@@ -6516,8 +6512,8 @@ radv_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer _buffer, VkDevi
RADV_FROM_HANDLE(radv_buffer, buffer, _buffer);
struct radv_dispatch_info info = {0};
info.indirect = buffer;
info.indirect_offset = offset;
info.indirect = buffer->bo;
info.va = radv_buffer_get_va(buffer->bo) + buffer->offset + offset;
radv_compute_dispatch(cmd_buffer, &info);
}
@@ -6535,6 +6531,17 @@ radv_unaligned_dispatch(struct radv_cmd_buffer *cmd_buffer, uint32_t x, uint32_t
radv_compute_dispatch(cmd_buffer, &info);
}
void
radv_indirect_dispatch(struct radv_cmd_buffer *cmd_buffer, struct radeon_winsys_bo *bo, uint64_t va)
{
struct radv_dispatch_info info = {0};
info.indirect = bo;
info.va = va;
radv_compute_dispatch(cmd_buffer, &info);
}
static void
radv_rt_dispatch(struct radv_cmd_buffer *cmd_buffer, const struct radv_dispatch_info *info)
{
src/amd/vulkan/radv_private.h
+3
View File
@@ -1643,6 +1643,9 @@ radv_get_viewport_xform(const VkViewport *viewport, float scale[3], float transl
void radv_unaligned_dispatch(struct radv_cmd_buffer *cmd_buffer, uint32_t x, uint32_t y,
uint32_t z);
void radv_indirect_dispatch(struct radv_cmd_buffer *cmd_buffer, struct radeon_winsys_bo *bo,
uint64_t va);
struct radv_event {
struct vk_object_base base;
struct radeon_winsys_bo *bo;