radeonsi: skip drawing if the tess factor ring allocation fails
Cc: 11.0 <mesa-stable@lists.freedesktop.org> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
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@@ -277,7 +277,7 @@ si_create_sampler_view_custom(struct pipe_context *ctx,
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unsigned force_level);
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/* si_state_shader.c */
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void si_update_shaders(struct si_context *sctx);
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bool si_update_shaders(struct si_context *sctx);
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void si_init_shader_functions(struct si_context *sctx);
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/* si_state_draw.c */
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@@ -759,8 +759,8 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
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else
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sctx->current_rast_prim = info->mode;
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si_update_shaders(sctx);
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if (!si_upload_shader_descriptors(sctx))
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if (!si_update_shaders(sctx) ||
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!si_upload_shader_descriptors(sctx))
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return;
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if (info->indexed) {
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@@ -1279,6 +1279,9 @@ static void si_init_tess_factor_ring(struct si_context *sctx)
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sctx->tf_ring = pipe_buffer_create(sctx->b.b.screen, PIPE_BIND_CUSTOM,
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PIPE_USAGE_DEFAULT,
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32768 * sctx->screen->b.info.max_se);
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if (!sctx->tf_ring)
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return;
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assert(((sctx->tf_ring->width0 / 4) & C_030938_SIZE) == 0);
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/* Append these registers to the init config state. */
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@@ -1385,15 +1388,18 @@ static void si_update_so(struct si_context *sctx, struct si_shader_selector *sha
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sctx->b.streamout.stride_in_dw = shader->so.stride;
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}
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void si_update_shaders(struct si_context *sctx)
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bool si_update_shaders(struct si_context *sctx)
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{
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struct pipe_context *ctx = (struct pipe_context*)sctx;
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struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
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/* Update stages before GS. */
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if (sctx->tes_shader) {
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if (!sctx->tf_ring)
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if (!sctx->tf_ring) {
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si_init_tess_factor_ring(sctx);
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if (!sctx->tf_ring)
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return false;
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}
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/* VS as LS */
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si_shader_select(ctx, sctx->vs_shader);
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@@ -1487,6 +1493,7 @@ void si_update_shaders(struct si_context *sctx)
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if (sctx->b.chip_class == SI)
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si_mark_atom_dirty(sctx, &sctx->db_render_state);
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}
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return true;
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}
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void si_init_shader_functions(struct si_context *sctx)
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